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| author | Pranav Karuvally | 2023-05-07 17:06:33 +0530 |
|---|---|---|
| committer | GitHub | 2023-05-07 17:06:33 +0530 |
| commit | 58072b7f39bc7448a32d0f937d2531e4625f9f75 (patch) | |
| tree | 4d513a11d2685a315ad655a23db6ec118829b088 /library/SubcircuitLibrary/CD_4023/README.md | |
| parent | 2de5fa0604c35a1508bca8bab318724da823633a (diff) | |
| parent | b145afdb869564df4131f0b0b472116ca744ef65 (diff) | |
| download | eSim-58072b7f39bc7448a32d0f937d2531e4625f9f75.tar.gz eSim-58072b7f39bc7448a32d0f937d2531e4625f9f75.tar.bz2 eSim-58072b7f39bc7448a32d0f937d2531e4625f9f75.zip | |
Merge branch 'FOSSEE:master' into master
Diffstat (limited to 'library/SubcircuitLibrary/CD_4023/README.md')
| -rw-r--r-- | library/SubcircuitLibrary/CD_4023/README.md | 26 |
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diff --git a/library/SubcircuitLibrary/CD_4023/README.md b/library/SubcircuitLibrary/CD_4023/README.md new file mode 100644 index 00000000..fe51165e --- /dev/null +++ b/library/SubcircuitLibrary/CD_4023/README.md @@ -0,0 +1,26 @@ + +# CD4023 IC + +It is 3-input NAND Gate IC. CD4023 IC is designed with 180nm CMOS technology in eSim consisting three NAND Gates. When both the inputs are HIGH then only output is LOW, otherwise HIGH. It is also called inverted AND Gate, a type of Universal logic Gate. + + +## Usage/Examples + +Burglar alarm + +Freezer warning buzzer + +## Documentation + +To know the details of CD4023 IC please go through with the documentation : [CD4023_datasheet](https://www.ti.com/lit/gpn/cd4023b) + +## Comments/Notes + +Please note this is a complete digital IC. It works fine at the time of simulation. + +## Contributer + +Name: Ankush Mondal +Email: mondalankush369@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellow 2022
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