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authorRahul P2023-06-13 18:21:12 +0530
committerGitHub2023-06-13 18:21:12 +0530
commit3436aa4615dcc1310db8dc8a85f36418db641fb4 (patch)
treee9cf9d33ed2c137f3ac463c7b272e27fe23be75d /library/SubcircuitLibrary/CD_4008
parent172debd60ec1bae09c6b9c9180a388628e819909 (diff)
parent9a5f3dabc357277b384c51ccf047f5580772f454 (diff)
downloadeSim-3436aa4615dcc1310db8dc8a85f36418db641fb4.tar.gz
eSim-3436aa4615dcc1310db8dc8a85f36418db641fb4.tar.bz2
eSim-3436aa4615dcc1310db8dc8a85f36418db641fb4.zip
Merge branch 'master' into sky130-dev
Diffstat (limited to 'library/SubcircuitLibrary/CD_4008')
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit-cache.lib100
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit.cir95
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit.cir.out98
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit.pro71
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit.sch2101
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit.sub92
-rw-r--r--library/SubcircuitLibrary/CD_4008/Adder_2bit_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008-cache.lib66
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008.cir13
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008.cir.out15
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008.pro71
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008.sch353
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008.sub9
-rw-r--r--library/SubcircuitLibrary/CD_4008/CD_4008_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/CD_4008/NMOS-180nm.lib13
-rw-r--r--library/SubcircuitLibrary/CD_4008/PMOS-180nm.lib11
-rw-r--r--library/SubcircuitLibrary/CD_4008/README.md27
-rw-r--r--library/SubcircuitLibrary/CD_4008/analysis1
18 files changed, 3138 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit-cache.lib b/library/SubcircuitLibrary/CD_4008/Adder_2bit-cache.lib
new file mode 100644
index 00000000..6c512720
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit-cache.lib
@@ -0,0 +1,100 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit.cir b/library/SubcircuitLibrary/CD_4008/Adder_2bit.cir
new file mode 100644
index 00000000..08ebd25f
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit.cir
@@ -0,0 +1,95 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\Adder_2bit\Adder_2bit.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/02/22 13:42:53
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M18 Net-_M18-Pad1_ Net-_M1-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M28 Net-_M18-Pad1_ Net-_M14-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M19 Net-_M19-Pad1_ Net-_M19-Pad2_ Net-_M18-Pad1_ Net-_M18-Pad1_ eSim_MOS_P
+M29 Net-_M19-Pad1_ Net-_M10-Pad2_ Net-_M18-Pad1_ Net-_M18-Pad1_ eSim_MOS_P
+M67 Net-_M64-Pad1_ Net-_M13-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M64 Net-_M64-Pad1_ Net-_M13-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M42 Net-_M19-Pad1_ Net-_M17-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M20 Net-_M20-Pad1_ Net-_M1-Pad2_ Net-_M19-Pad1_ Net-_M19-Pad1_ eSim_MOS_P
+M30 Net-_M20-Pad1_ Net-_M10-Pad2_ Net-_M19-Pad1_ Net-_M19-Pad1_ eSim_MOS_P
+M21 Net-_M13-Pad1_ Net-_M19-Pad2_ Net-_M20-Pad1_ Net-_M20-Pad1_ eSim_MOS_P
+M31 Net-_M13-Pad1_ Net-_M14-Pad2_ Net-_M20-Pad1_ Net-_M20-Pad1_ eSim_MOS_P
+M43 Net-_M13-Pad1_ Net-_M11-Pad2_ Net-_M19-Pad1_ Net-_M19-Pad1_ eSim_MOS_P
+M13 Net-_M13-Pad1_ Net-_M1-Pad2_ Net-_M13-Pad3_ Net-_M13-Pad3_ eSim_MOS_N
+M14 Net-_M13-Pad3_ Net-_M14-Pad2_ Net-_M14-Pad3_ Net-_M14-Pad3_ eSim_MOS_N
+M24 Net-_M13-Pad1_ Net-_M19-Pad2_ Net-_M24-Pad3_ Net-_M24-Pad3_ eSim_MOS_N
+M25 Net-_M24-Pad3_ Net-_M10-Pad2_ Net-_M14-Pad3_ Net-_M14-Pad3_ eSim_MOS_N
+M17 Net-_M14-Pad3_ Net-_M17-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M35 Net-_M13-Pad1_ Net-_M1-Pad2_ Net-_M35-Pad3_ Net-_M35-Pad3_ eSim_MOS_N
+M36 Net-_M35-Pad3_ Net-_M10-Pad2_ Net-_M36-Pad3_ Net-_M36-Pad3_ eSim_MOS_N
+M49 Net-_M13-Pad1_ Net-_M19-Pad2_ Net-_M49-Pad3_ Net-_M49-Pad3_ eSim_MOS_N
+M50 Net-_M49-Pad3_ Net-_M14-Pad2_ Net-_M36-Pad3_ Net-_M36-Pad3_ eSim_MOS_N
+M41 Net-_M36-Pad3_ Net-_M11-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M7 Net-_M19-Pad2_ Net-_M1-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M6 Net-_M19-Pad2_ Net-_M1-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M61 Net-_M14-Pad2_ Net-_M10-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M63 Net-_M14-Pad2_ Net-_M10-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M58 Net-_M17-Pad2_ Net-_M11-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M59 Net-_M17-Pad2_ Net-_M11-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M3 Net-_M10-Pad1_ Net-_M1-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M10 Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M4 Net-_M11-Pad1_ Net-_M10-Pad2_ Net-_M10-Pad1_ Net-_M10-Pad1_ eSim_MOS_P
+M11 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M10-Pad1_ Net-_M10-Pad1_ eSim_MOS_P
+M5 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P
+M12 Net-_M1-Pad1_ Net-_M11-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P
+M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M2 Net-_M1-Pad3_ Net-_M10-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M8 Net-_M1-Pad1_ Net-_M10-Pad2_ Net-_M8-Pad3_ Net-_M8-Pad3_ eSim_MOS_N
+M9 Net-_M8-Pad3_ Net-_M11-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M15 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M15-Pad3_ Net-_M15-Pad3_ eSim_MOS_N
+M16 Net-_M15-Pad3_ Net-_M11-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M23 Net-_M22-Pad1_ Net-_M1-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M22 Net-_M22-Pad1_ Net-_M1-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M54 Net-_M54-Pad1_ Net-_M26-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M68 Net-_M54-Pad1_ Net-_M48-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M55 Net-_M55-Pad1_ Net-_M37-Pad1_ Net-_M54-Pad1_ Net-_M54-Pad1_ eSim_MOS_P
+M69 Net-_M55-Pad1_ Net-_M27-Pad2_ Net-_M54-Pad1_ Net-_M54-Pad1_ eSim_MOS_P
+M84 Net-_M83-Pad1_ Net-_M47-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M83 Net-_M83-Pad1_ Net-_M47-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M75 Net-_M55-Pad1_ Net-_M53-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M56 Net-_M56-Pad1_ Net-_M26-Pad2_ Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P
+M70 Net-_M56-Pad1_ Net-_M27-Pad2_ Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P
+M57 Net-_M47-Pad1_ Net-_M37-Pad1_ Net-_M56-Pad1_ Net-_M56-Pad1_ eSim_MOS_P
+M71 Net-_M47-Pad1_ Net-_M48-Pad2_ Net-_M56-Pad1_ Net-_M56-Pad1_ eSim_MOS_P
+M76 Net-_M47-Pad1_ Net-_M22-Pad1_ Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P
+M47 Net-_M47-Pad1_ Net-_M26-Pad2_ Net-_M47-Pad3_ Net-_M47-Pad3_ eSim_MOS_N
+M48 Net-_M47-Pad3_ Net-_M48-Pad2_ Net-_M48-Pad3_ Net-_M48-Pad3_ eSim_MOS_N
+M65 Net-_M47-Pad1_ Net-_M37-Pad1_ Net-_M65-Pad3_ Net-_M65-Pad3_ eSim_MOS_N
+M66 Net-_M65-Pad3_ Net-_M27-Pad2_ Net-_M48-Pad3_ Net-_M48-Pad3_ eSim_MOS_N
+M53 Net-_M48-Pad3_ Net-_M53-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M72 Net-_M47-Pad1_ Net-_M26-Pad2_ Net-_M72-Pad3_ Net-_M72-Pad3_ eSim_MOS_N
+M73 Net-_M72-Pad3_ Net-_M27-Pad2_ Net-_M73-Pad3_ Net-_M73-Pad3_ eSim_MOS_N
+M77 Net-_M47-Pad1_ Net-_M37-Pad1_ Net-_M77-Pad3_ Net-_M77-Pad3_ eSim_MOS_N
+M78 Net-_M77-Pad3_ Net-_M48-Pad2_ Net-_M73-Pad3_ Net-_M73-Pad3_ eSim_MOS_N
+M74 Net-_M73-Pad3_ Net-_M22-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M38 Net-_M37-Pad1_ Net-_M26-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M37 Net-_M37-Pad1_ Net-_M26-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M81 Net-_M48-Pad2_ Net-_M27-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M82 Net-_M48-Pad2_ Net-_M27-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M79 Net-_M53-Pad2_ Net-_M22-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M80 Net-_M53-Pad2_ Net-_M22-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M32 Net-_M32-Pad1_ Net-_M26-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M44 Net-_M32-Pad1_ Net-_M27-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M33 Net-_M33-Pad1_ Net-_M27-Pad2_ Net-_M32-Pad1_ Net-_M32-Pad1_ eSim_MOS_P
+M45 Net-_M33-Pad1_ Net-_M22-Pad1_ Net-_M32-Pad1_ Net-_M32-Pad1_ eSim_MOS_P
+M34 Net-_M26-Pad1_ Net-_M26-Pad2_ Net-_M33-Pad1_ Net-_M33-Pad1_ eSim_MOS_P
+M46 Net-_M26-Pad1_ Net-_M22-Pad1_ Net-_M33-Pad1_ Net-_M33-Pad1_ eSim_MOS_P
+M26 Net-_M26-Pad1_ Net-_M26-Pad2_ Net-_M26-Pad3_ Net-_M26-Pad3_ eSim_MOS_N
+M27 Net-_M26-Pad3_ Net-_M27-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M39 Net-_M26-Pad1_ Net-_M27-Pad2_ Net-_M39-Pad3_ Net-_M39-Pad3_ eSim_MOS_N
+M40 Net-_M39-Pad3_ Net-_M22-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M51 Net-_M26-Pad1_ Net-_M26-Pad2_ Net-_M51-Pad3_ Net-_M51-Pad3_ eSim_MOS_N
+M52 Net-_M51-Pad3_ Net-_M22-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M62 Net-_M60-Pad1_ Net-_M26-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M60 Net-_M60-Pad1_ Net-_M26-Pad1_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+U1 Net-_M27-Pad2_ Net-_M26-Pad2_ Net-_M10-Pad2_ Net-_M1-Pad2_ Net-_M16-Pad3_ Net-_M11-Pad2_ Net-_M64-Pad1_ Net-_M83-Pad1_ Net-_M10-Pad3_ Net-_M60-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit.cir.out b/library/SubcircuitLibrary/CD_4008/Adder_2bit.cir.out
new file mode 100644
index 00000000..4779b944
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit.cir.out
@@ -0,0 +1,98 @@
+* c:\fossee\esim\library\subcircuitlibrary\adder_2bit\adder_2bit.cir
+
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m18 net-_m18-pad1_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m28 net-_m18-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m19 net-_m19-pad1_ net-_m19-pad2_ net-_m18-pad1_ net-_m18-pad1_ CMOSP W=100u L=100u M=1
+m29 net-_m19-pad1_ net-_m10-pad2_ net-_m18-pad1_ net-_m18-pad1_ CMOSP W=100u L=100u M=1
+m67 net-_m64-pad1_ net-_m13-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m64 net-_m64-pad1_ net-_m13-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m42 net-_m19-pad1_ net-_m17-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m20 net-_m20-pad1_ net-_m1-pad2_ net-_m19-pad1_ net-_m19-pad1_ CMOSP W=100u L=100u M=1
+m30 net-_m20-pad1_ net-_m10-pad2_ net-_m19-pad1_ net-_m19-pad1_ CMOSP W=100u L=100u M=1
+m21 net-_m13-pad1_ net-_m19-pad2_ net-_m20-pad1_ net-_m20-pad1_ CMOSP W=100u L=100u M=1
+m31 net-_m13-pad1_ net-_m14-pad2_ net-_m20-pad1_ net-_m20-pad1_ CMOSP W=100u L=100u M=1
+m43 net-_m13-pad1_ net-_m11-pad2_ net-_m19-pad1_ net-_m19-pad1_ CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ net-_m1-pad2_ net-_m13-pad3_ net-_m13-pad3_ CMOSN W=100u L=100u M=1
+m14 net-_m13-pad3_ net-_m14-pad2_ net-_m14-pad3_ net-_m14-pad3_ CMOSN W=100u L=100u M=1
+m24 net-_m13-pad1_ net-_m19-pad2_ net-_m24-pad3_ net-_m24-pad3_ CMOSN W=100u L=100u M=1
+m25 net-_m24-pad3_ net-_m10-pad2_ net-_m14-pad3_ net-_m14-pad3_ CMOSN W=100u L=100u M=1
+m17 net-_m14-pad3_ net-_m17-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m35 net-_m13-pad1_ net-_m1-pad2_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1
+m36 net-_m35-pad3_ net-_m10-pad2_ net-_m36-pad3_ net-_m36-pad3_ CMOSN W=100u L=100u M=1
+m49 net-_m13-pad1_ net-_m19-pad2_ net-_m49-pad3_ net-_m49-pad3_ CMOSN W=100u L=100u M=1
+m50 net-_m49-pad3_ net-_m14-pad2_ net-_m36-pad3_ net-_m36-pad3_ CMOSN W=100u L=100u M=1
+m41 net-_m36-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m19-pad2_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m6 net-_m19-pad2_ net-_m1-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m61 net-_m14-pad2_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m63 net-_m14-pad2_ net-_m10-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m58 net-_m17-pad2_ net-_m11-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m59 net-_m17-pad2_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m3 net-_m10-pad1_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m4 net-_m11-pad1_ net-_m10-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSP W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSP W=100u L=100u M=1
+m5 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m12 net-_m1-pad1_ net-_m11-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m2 net-_m1-pad3_ net-_m10-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m1-pad1_ net-_m10-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m8-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m15 net-_m1-pad1_ net-_m1-pad2_ net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m15-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m23 net-_m22-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m22 net-_m22-pad1_ net-_m1-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m54 net-_m54-pad1_ net-_m26-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m68 net-_m54-pad1_ net-_m48-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m55 net-_m55-pad1_ net-_m37-pad1_ net-_m54-pad1_ net-_m54-pad1_ CMOSP W=100u L=100u M=1
+m69 net-_m55-pad1_ net-_m27-pad2_ net-_m54-pad1_ net-_m54-pad1_ CMOSP W=100u L=100u M=1
+m84 net-_m83-pad1_ net-_m47-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m83 net-_m83-pad1_ net-_m47-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m75 net-_m55-pad1_ net-_m53-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m56 net-_m56-pad1_ net-_m26-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m70 net-_m56-pad1_ net-_m27-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m57 net-_m47-pad1_ net-_m37-pad1_ net-_m56-pad1_ net-_m56-pad1_ CMOSP W=100u L=100u M=1
+m71 net-_m47-pad1_ net-_m48-pad2_ net-_m56-pad1_ net-_m56-pad1_ CMOSP W=100u L=100u M=1
+m76 net-_m47-pad1_ net-_m22-pad1_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m47 net-_m47-pad1_ net-_m26-pad2_ net-_m47-pad3_ net-_m47-pad3_ CMOSN W=100u L=100u M=1
+m48 net-_m47-pad3_ net-_m48-pad2_ net-_m48-pad3_ net-_m48-pad3_ CMOSN W=100u L=100u M=1
+m65 net-_m47-pad1_ net-_m37-pad1_ net-_m65-pad3_ net-_m65-pad3_ CMOSN W=100u L=100u M=1
+m66 net-_m65-pad3_ net-_m27-pad2_ net-_m48-pad3_ net-_m48-pad3_ CMOSN W=100u L=100u M=1
+m53 net-_m48-pad3_ net-_m53-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m72 net-_m47-pad1_ net-_m26-pad2_ net-_m72-pad3_ net-_m72-pad3_ CMOSN W=100u L=100u M=1
+m73 net-_m72-pad3_ net-_m27-pad2_ net-_m73-pad3_ net-_m73-pad3_ CMOSN W=100u L=100u M=1
+m77 net-_m47-pad1_ net-_m37-pad1_ net-_m77-pad3_ net-_m77-pad3_ CMOSN W=100u L=100u M=1
+m78 net-_m77-pad3_ net-_m48-pad2_ net-_m73-pad3_ net-_m73-pad3_ CMOSN W=100u L=100u M=1
+m74 net-_m73-pad3_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m38 net-_m37-pad1_ net-_m26-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m37 net-_m37-pad1_ net-_m26-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m81 net-_m48-pad2_ net-_m27-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m82 net-_m48-pad2_ net-_m27-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m79 net-_m53-pad2_ net-_m22-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m80 net-_m53-pad2_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m32 net-_m32-pad1_ net-_m26-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m44 net-_m32-pad1_ net-_m27-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m33 net-_m33-pad1_ net-_m27-pad2_ net-_m32-pad1_ net-_m32-pad1_ CMOSP W=100u L=100u M=1
+m45 net-_m33-pad1_ net-_m22-pad1_ net-_m32-pad1_ net-_m32-pad1_ CMOSP W=100u L=100u M=1
+m34 net-_m26-pad1_ net-_m26-pad2_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1
+m46 net-_m26-pad1_ net-_m22-pad1_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1
+m26 net-_m26-pad1_ net-_m26-pad2_ net-_m26-pad3_ net-_m26-pad3_ CMOSN W=100u L=100u M=1
+m27 net-_m26-pad3_ net-_m27-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m39 net-_m26-pad1_ net-_m27-pad2_ net-_m39-pad3_ net-_m39-pad3_ CMOSN W=100u L=100u M=1
+m40 net-_m39-pad3_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m51 net-_m26-pad1_ net-_m26-pad2_ net-_m51-pad3_ net-_m51-pad3_ CMOSN W=100u L=100u M=1
+m52 net-_m51-pad3_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m62 net-_m60-pad1_ net-_m26-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m60 net-_m60-pad1_ net-_m26-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+* u1 net-_m27-pad2_ net-_m26-pad2_ net-_m10-pad2_ net-_m1-pad2_ net-_m16-pad3_ net-_m11-pad2_ net-_m64-pad1_ net-_m83-pad1_ net-_m10-pad3_ net-_m60-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit.pro b/library/SubcircuitLibrary/CD_4008/Adder_2bit.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit.sch b/library/SubcircuitLibrary/CD_4008/Adder_2bit.sch
new file mode 100644
index 00000000..4f7e97e3
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit.sch
@@ -0,0 +1,2101 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:CD_4008_Adder-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ -7650 9600
+Wire Wire Line
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+Connection ~ -7450 9600
+Wire Wire Line
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+Connection ~ -7450 9150
+Wire Wire Line
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+Connection ~ -7650 9150
+Wire Wire Line
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+Connection ~ -7650 8700
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ -7550 9600
+Connection ~ -7550 9550
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ -7200 10950
+Wire Wire Line
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+Connection ~ -7900 10950
+Wire Wire Line
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+Connection ~ -7550 10100
+Connection ~ -7550 10000
+Wire Wire Line
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+Connection ~ -6400 10050
+Connection ~ -7550 10050
+Wire Wire Line
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+Connection ~ -6050 9550
+Wire Wire Line
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+Connection ~ -6050 10450
+Wire Wire Line
+ -5200 8250 -5200 11450
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ -8300 7000 -8300 10300
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ -7050 9350 -5650 9350
+Wire Wire Line
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+Wire Wire Line
+ -6950 9800 -7050 9800
+Connection ~ -6950 10600
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+ -5750 7750 -6350 7750
+Wire Wire Line
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+Wire Wire Line
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+ -3500 6100 -3500 1750
+Wire Wire Line
+ -6350 550 -3000 550
+Wire Wire Line
+ -3000 -3950 -3000 550
+Connection ~ -8550 -3950
+Wire Wire Line
+ -6100 10050 -2800 10050
+Wire Wire Line
+ -8600 -3950 -3000 -3950
+$Comp
+L PORT U1
+U 7 1 6299803F
+P -10850 -3100
+F 0 "U1" H -10800 -3000 30 0000 C CNN
+F 1 "PORT" H -10850 -3100 30 0000 C CNN
+F 2 "" H -10850 -3100 60 0000 C CNN
+F 3 "" H -10850 -3100 60 0000 C CNN
+ 7 -10850 -3100
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 16 1 6299837D
+P -8850 -3950
+F 0 "U1" H -8800 -3850 30 0000 C CNN
+F 1 "PORT" H -8850 -3950 30 0000 C CNN
+F 2 "" H -8850 -3950 60 0000 C CNN
+F 3 "" H -8850 -3950 60 0000 C CNN
+ 16 -8850 -3950
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 62998605
+P -5000 -3100
+F 0 "U1" H -4950 -3000 30 0000 C CNN
+F 1 "PORT" H -5000 -3100 30 0000 C CNN
+F 2 "" H -5000 -3100 60 0000 C CNN
+F 3 "" H -5000 -3100 60 0000 C CNN
+ 6 -5000 -3100
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 9 1 62998792
+P -5000 -2200
+F 0 "U1" H -4950 -2100 30 0000 C CNN
+F 1 "PORT" H -5000 -2200 30 0000 C CNN
+F 2 "" H -5000 -2200 60 0000 C CNN
+F 3 "" H -5000 -2200 60 0000 C CNN
+ 9 -5000 -2200
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 10 1 6299963D
+P -5200 -1550
+F 0 "U1" H -5150 -1450 30 0000 C CNN
+F 1 "PORT" H -5200 -1550 30 0000 C CNN
+F 2 "" H -5200 -1550 60 0000 C CNN
+F 3 "" H -5200 -1550 60 0000 C CNN
+ 10 -5200 -1550
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 6299FB00
+P -8650 5200
+F 0 "U1" H -8600 5300 30 0000 C CNN
+F 1 "PORT" H -8650 5200 30 0000 C CNN
+F 2 "" H -8650 5200 60 0000 C CNN
+F 3 "" H -8650 5200 60 0000 C CNN
+ 5 -8650 5200
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 629A0EB3
+P -2800 5200
+F 0 "U1" H -2750 5300 30 0000 C CNN
+F 1 "PORT" H -2800 5200 30 0000 C CNN
+F 2 "" H -2800 5200 60 0000 C CNN
+F 3 "" H -2800 5200 60 0000 C CNN
+ 4 -2800 5200
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 11 1 629A4397
+P -3000 6750
+F 0 "U1" H -2950 6850 30 0000 C CNN
+F 1 "PORT" H -3000 6750 30 0000 C CNN
+F 2 "" H -3000 6750 60 0000 C CNN
+F 3 "" H -3000 6750 60 0000 C CNN
+ 11 -3000 6750
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 17 1 629A56CE
+P -2550 10050
+F 0 "U1" H -2500 10150 30 0000 C CNN
+F 1 "PORT" H -2550 10050 30 0000 C CNN
+F 2 "" H -2550 10050 60 0000 C CNN
+F 3 "" H -2550 10050 60 0000 C CNN
+ 17 -2550 10050
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 629A86A4
+P -4900 11450
+F 0 "U1" H -4850 11550 30 0000 C CNN
+F 1 "PORT" H -4900 11450 30 0000 C CNN
+F 2 "" H -4900 11450 60 0000 C CNN
+F 3 "" H -4900 11450 60 0000 C CNN
+ 8 -4900 11450
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ -5200 11450 -5150 11450
+Connection ~ -5200 10950
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit.sub b/library/SubcircuitLibrary/CD_4008/Adder_2bit.sub
new file mode 100644
index 00000000..f94f0c02
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit.sub
@@ -0,0 +1,92 @@
+* Subcircuit Adder_2bit
+.subckt Adder_2bit net-_m27-pad2_ net-_m26-pad2_ net-_m10-pad2_ net-_m1-pad2_ net-_m16-pad3_ net-_m11-pad2_ net-_m64-pad1_ net-_m83-pad1_ net-_m10-pad3_ net-_m60-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\adder_2bit\adder_2bit.cir
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m18 net-_m18-pad1_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m28 net-_m18-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m19 net-_m19-pad1_ net-_m19-pad2_ net-_m18-pad1_ net-_m18-pad1_ CMOSP W=100u L=100u M=1
+m29 net-_m19-pad1_ net-_m10-pad2_ net-_m18-pad1_ net-_m18-pad1_ CMOSP W=100u L=100u M=1
+m67 net-_m64-pad1_ net-_m13-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m64 net-_m64-pad1_ net-_m13-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m42 net-_m19-pad1_ net-_m17-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m20 net-_m20-pad1_ net-_m1-pad2_ net-_m19-pad1_ net-_m19-pad1_ CMOSP W=100u L=100u M=1
+m30 net-_m20-pad1_ net-_m10-pad2_ net-_m19-pad1_ net-_m19-pad1_ CMOSP W=100u L=100u M=1
+m21 net-_m13-pad1_ net-_m19-pad2_ net-_m20-pad1_ net-_m20-pad1_ CMOSP W=100u L=100u M=1
+m31 net-_m13-pad1_ net-_m14-pad2_ net-_m20-pad1_ net-_m20-pad1_ CMOSP W=100u L=100u M=1
+m43 net-_m13-pad1_ net-_m11-pad2_ net-_m19-pad1_ net-_m19-pad1_ CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ net-_m1-pad2_ net-_m13-pad3_ net-_m13-pad3_ CMOSN W=100u L=100u M=1
+m14 net-_m13-pad3_ net-_m14-pad2_ net-_m14-pad3_ net-_m14-pad3_ CMOSN W=100u L=100u M=1
+m24 net-_m13-pad1_ net-_m19-pad2_ net-_m24-pad3_ net-_m24-pad3_ CMOSN W=100u L=100u M=1
+m25 net-_m24-pad3_ net-_m10-pad2_ net-_m14-pad3_ net-_m14-pad3_ CMOSN W=100u L=100u M=1
+m17 net-_m14-pad3_ net-_m17-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m35 net-_m13-pad1_ net-_m1-pad2_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1
+m36 net-_m35-pad3_ net-_m10-pad2_ net-_m36-pad3_ net-_m36-pad3_ CMOSN W=100u L=100u M=1
+m49 net-_m13-pad1_ net-_m19-pad2_ net-_m49-pad3_ net-_m49-pad3_ CMOSN W=100u L=100u M=1
+m50 net-_m49-pad3_ net-_m14-pad2_ net-_m36-pad3_ net-_m36-pad3_ CMOSN W=100u L=100u M=1
+m41 net-_m36-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m19-pad2_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m6 net-_m19-pad2_ net-_m1-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m61 net-_m14-pad2_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m63 net-_m14-pad2_ net-_m10-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m58 net-_m17-pad2_ net-_m11-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m59 net-_m17-pad2_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m3 net-_m10-pad1_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m4 net-_m11-pad1_ net-_m10-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSP W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSP W=100u L=100u M=1
+m5 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m12 net-_m1-pad1_ net-_m11-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m2 net-_m1-pad3_ net-_m10-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m1-pad1_ net-_m10-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m8-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m15 net-_m1-pad1_ net-_m1-pad2_ net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m15-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m23 net-_m22-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m22 net-_m22-pad1_ net-_m1-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m54 net-_m54-pad1_ net-_m26-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m68 net-_m54-pad1_ net-_m48-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m55 net-_m55-pad1_ net-_m37-pad1_ net-_m54-pad1_ net-_m54-pad1_ CMOSP W=100u L=100u M=1
+m69 net-_m55-pad1_ net-_m27-pad2_ net-_m54-pad1_ net-_m54-pad1_ CMOSP W=100u L=100u M=1
+m84 net-_m83-pad1_ net-_m47-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m83 net-_m83-pad1_ net-_m47-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m75 net-_m55-pad1_ net-_m53-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m56 net-_m56-pad1_ net-_m26-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m70 net-_m56-pad1_ net-_m27-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m57 net-_m47-pad1_ net-_m37-pad1_ net-_m56-pad1_ net-_m56-pad1_ CMOSP W=100u L=100u M=1
+m71 net-_m47-pad1_ net-_m48-pad2_ net-_m56-pad1_ net-_m56-pad1_ CMOSP W=100u L=100u M=1
+m76 net-_m47-pad1_ net-_m22-pad1_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m47 net-_m47-pad1_ net-_m26-pad2_ net-_m47-pad3_ net-_m47-pad3_ CMOSN W=100u L=100u M=1
+m48 net-_m47-pad3_ net-_m48-pad2_ net-_m48-pad3_ net-_m48-pad3_ CMOSN W=100u L=100u M=1
+m65 net-_m47-pad1_ net-_m37-pad1_ net-_m65-pad3_ net-_m65-pad3_ CMOSN W=100u L=100u M=1
+m66 net-_m65-pad3_ net-_m27-pad2_ net-_m48-pad3_ net-_m48-pad3_ CMOSN W=100u L=100u M=1
+m53 net-_m48-pad3_ net-_m53-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m72 net-_m47-pad1_ net-_m26-pad2_ net-_m72-pad3_ net-_m72-pad3_ CMOSN W=100u L=100u M=1
+m73 net-_m72-pad3_ net-_m27-pad2_ net-_m73-pad3_ net-_m73-pad3_ CMOSN W=100u L=100u M=1
+m77 net-_m47-pad1_ net-_m37-pad1_ net-_m77-pad3_ net-_m77-pad3_ CMOSN W=100u L=100u M=1
+m78 net-_m77-pad3_ net-_m48-pad2_ net-_m73-pad3_ net-_m73-pad3_ CMOSN W=100u L=100u M=1
+m74 net-_m73-pad3_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m38 net-_m37-pad1_ net-_m26-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m37 net-_m37-pad1_ net-_m26-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m81 net-_m48-pad2_ net-_m27-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m82 net-_m48-pad2_ net-_m27-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m79 net-_m53-pad2_ net-_m22-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m80 net-_m53-pad2_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m32 net-_m32-pad1_ net-_m26-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m44 net-_m32-pad1_ net-_m27-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m33 net-_m33-pad1_ net-_m27-pad2_ net-_m32-pad1_ net-_m32-pad1_ CMOSP W=100u L=100u M=1
+m45 net-_m33-pad1_ net-_m22-pad1_ net-_m32-pad1_ net-_m32-pad1_ CMOSP W=100u L=100u M=1
+m34 net-_m26-pad1_ net-_m26-pad2_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1
+m46 net-_m26-pad1_ net-_m22-pad1_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1
+m26 net-_m26-pad1_ net-_m26-pad2_ net-_m26-pad3_ net-_m26-pad3_ CMOSN W=100u L=100u M=1
+m27 net-_m26-pad3_ net-_m27-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m39 net-_m26-pad1_ net-_m27-pad2_ net-_m39-pad3_ net-_m39-pad3_ CMOSN W=100u L=100u M=1
+m40 net-_m39-pad3_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m51 net-_m26-pad1_ net-_m26-pad2_ net-_m51-pad3_ net-_m51-pad3_ CMOSN W=100u L=100u M=1
+m52 net-_m51-pad3_ net-_m22-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m62 net-_m60-pad1_ net-_m26-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m60 net-_m60-pad1_ net-_m26-pad1_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+* Control Statements
+
+.ends Adder_2bit \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4008/Adder_2bit_Previous_Values.xml b/library/SubcircuitLibrary/CD_4008/Adder_2bit_Previous_Values.xml
new file mode 100644
index 00000000..f015d34c
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/Adder_2bit_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel><m18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m18><m28><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m28><m19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m19><m29><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m29><m67><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m67><m64><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m64><m42><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m42><m20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m20><m30><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m30><m21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m21><m31><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m31><m43><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m43><m13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m13><m14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m14><m24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m24><m25><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m25><m17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m17><m35><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m35><m36><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m36><m49><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m49><m50><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m50><m41><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m41><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m7><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m6><m61><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m61><m63><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m63><m58><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m58><m59><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m59><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m3><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m10><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m4><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m11><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m5><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m12><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m1><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m9><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m15><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m16><m23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m23><m22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m22><m54><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m54><m68><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m68><m55><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m55><m69><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m69><m84><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m84><m83><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m83><m75><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m75><m56><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m56><m70><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m70><m57><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m57><m71><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m71><m76><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m76><m47><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m47><m48><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m48><m65><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m65><m66><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m66><m53><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m53><m72><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m72><m73><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m73><m77><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m77><m78><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m78><m74><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m74><m38><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m38><m37><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m37><m81><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m81><m82><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m82><m79><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m79><m80><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m80><m32><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m32><m44><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m44><m33><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m33><m45><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m45><m34><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m34><m46><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m46><m26><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m26><m27><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m27><m39><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m39><m40><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m40><m51><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m51><m52><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m52><m62><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m62><m60><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m60></devicemodel><subcircuit /></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008-cache.lib b/library/SubcircuitLibrary/CD_4008/CD_4008-cache.lib
new file mode 100644
index 00000000..fe35cb8f
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008-cache.lib
@@ -0,0 +1,66 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# Adder_2Bit
+#
+DEF Adder_2Bit X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Adder_2Bit" 0 100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -450 650 450 -550 0 1 0 N
+X B1 4 -650 150 200 R 50 50 1 1 I
+X A1 5 -650 0 200 R 50 50 1 1 I
+X B0 6 -650 -150 200 R 50 50 1 1 I
+X A0 7 -650 -300 200 R 50 50 1 1 I
+X GND 8 -650 -450 200 R 50 50 1 1 I
+X Cin 9 650 -450 200 L 50 50 1 1 O
+X S0 10 650 -300 200 L 50 50 1 1 O
+X S1 11 650 -150 200 L 50 50 1 1 O
+X VDD 16 650 550 200 L 50 50 1 1 I
+X Co 17 650 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008.cir b/library/SubcircuitLibrary/CD_4008/CD_4008.cir
new file mode 100644
index 00000000..6909def4
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008.cir
@@ -0,0 +1,13 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD_4008\CD_4008.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/02/22 20:13:23
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1 Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad16_ Net-_X1-Pad17_ Adder_2Bit
+X2 Net-_U1-Pad15_ Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad8_ Net-_X1-Pad17_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad16_ Net-_U1-Pad14_ Adder_2Bit
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008.cir.out b/library/SubcircuitLibrary/CD_4008/CD_4008.cir.out
new file mode 100644
index 00000000..3d2544ee
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008.cir.out
@@ -0,0 +1,15 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd_4008\cd_4008.cir
+
+.include Adder_2bit.sub
+x1 net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad16_ net-_x1-pad17_ Adder_2bit
+x2 net-_u1-pad15_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad8_ net-_x1-pad17_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad16_ net-_u1-pad14_ Adder_2bit
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008.pro b/library/SubcircuitLibrary/CD_4008/CD_4008.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008.sch b/library/SubcircuitLibrary/CD_4008/CD_4008.sch
new file mode 100644
index 00000000..e10152f2
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008.sch
@@ -0,0 +1,353 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:CD4008_ADDER_4bit-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L Adder_2Bit X1
+U 1 1 6298C667
+P 4950 4150
+F 0 "X1" H 4950 4150 60 0000 C CNN
+F 1 "Adder_2Bit" H 4950 4250 60 0000 C CNN
+F 2 "" H 4950 4150 60 0001 C CNN
+F 3 "" H 4950 4150 60 0001 C CNN
+ 1 4950 4150
+ 1 0 0 -1
+$EndComp
+$Comp
+L Adder_2Bit X2
+U 1 1 6298C668
+P 6600 4150
+F 0 "X2" H 6600 4150 60 0000 C CNN
+F 1 "Adder_2Bit" H 6600 4250 60 0000 C CNN
+F 2 "" H 6600 4150 60 0001 C CNN
+F 3 "" H 6600 4150 60 0001 C CNN
+ 1 6600 4150
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5600 4000 5750 4000
+Wire Wire Line
+ 5750 4000 5750 4800
+Wire Wire Line
+ 5750 4800 7250 4800
+Wire Wire Line
+ 7250 4800 7250 4600
+Wire Wire Line
+ 7250 2850 7250 3600
+Wire Wire Line
+ 7250 3400 5600 3400
+Wire Wire Line
+ 5600 3400 5600 3600
+Wire Wire Line
+ 5950 4850 5950 4600
+Wire Wire Line
+ 4300 4850 5950 4850
+Wire Wire Line
+ 4300 4850 4300 4600
+Wire Wire Line
+ 2700 2000 4300 2000
+Wire Wire Line
+ 4300 2000 4300 4000
+Wire Wire Line
+ 2700 2450 3850 2450
+Wire Wire Line
+ 3850 2450 3850 4150
+Wire Wire Line
+ 3850 4150 4300 4150
+Wire Wire Line
+ 2700 2950 3600 2950
+Wire Wire Line
+ 3600 2950 3600 4300
+Wire Wire Line
+ 3600 4300 4300 4300
+Wire Wire Line
+ 2700 3500 3400 3500
+Wire Wire Line
+ 3400 3500 3400 4450
+Wire Wire Line
+ 3400 4450 4300 4450
+Wire Wire Line
+ 5650 2850 5650 4300
+Wire Wire Line
+ 5650 4300 5600 4300
+Wire Wire Line
+ 5750 3100 5700 3100
+Wire Wire Line
+ 5700 3100 5700 4450
+Wire Wire Line
+ 5700 4450 5600 4450
+Wire Wire Line
+ 2700 4050 3200 4050
+Wire Wire Line
+ 3200 4050 3200 3700
+Wire Wire Line
+ 3200 3700 5950 3700
+Wire Wire Line
+ 5950 3700 5950 4000
+Wire Wire Line
+ 2700 4500 3300 4500
+Wire Wire Line
+ 3300 4500 3300 3800
+Wire Wire Line
+ 3300 3800 5900 3800
+Wire Wire Line
+ 5900 3800 5900 4150
+Wire Wire Line
+ 5900 4150 5950 4150
+Wire Wire Line
+ 2700 5000 5800 5000
+Wire Wire Line
+ 5800 5000 5800 4300
+Wire Wire Line
+ 5800 4300 5950 4300
+Wire Wire Line
+ 2700 5550 5900 5550
+Wire Wire Line
+ 5900 5550 5900 4450
+Wire Wire Line
+ 5900 4450 5950 4450
+Wire Wire Line
+ 7250 4300 7500 4300
+Wire Wire Line
+ 7250 4450 7500 4450
+Wire Wire Line
+ 7500 4450 7500 4550
+Wire Wire Line
+ 7250 4000 7550 4000
+Wire Wire Line
+ 6400 4900 5600 4900
+Wire Wire Line
+ 5600 4900 5600 4600
+Wire Wire Line
+ 7250 2850 7300 2850
+Connection ~ 7250 3400
+Connection ~ 5200 4850
+Wire Wire Line
+ 5200 5800 5200 4850
+$Comp
+L PORT U1
+U 1 1 6298E683
+P 2450 4500
+F 0 "U1" H 2500 4600 30 0000 C CNN
+F 1 "PORT" H 2450 4500 30 0000 C CNN
+F 2 "" H 2450 4500 60 0000 C CNN
+F 3 "" H 2450 4500 60 0000 C CNN
+ 1 2450 4500
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 6298E6C8
+P 2450 5000
+F 0 "U1" H 2500 5100 30 0000 C CNN
+F 1 "PORT" H 2450 5000 30 0000 C CNN
+F 2 "" H 2450 5000 60 0000 C CNN
+F 3 "" H 2450 5000 60 0000 C CNN
+ 2 2450 5000
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 6298E74C
+P 2450 5550
+F 0 "U1" H 2500 5650 30 0000 C CNN
+F 1 "PORT" H 2450 5550 30 0000 C CNN
+F 2 "" H 2450 5550 60 0000 C CNN
+F 3 "" H 2450 5550 60 0000 C CNN
+ 3 2450 5550
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 15 1 6298EDFF
+P 2450 4050
+F 0 "U1" H 2500 4150 30 0000 C CNN
+F 1 "PORT" H 2450 4050 30 0000 C CNN
+F 2 "" H 2450 4050 60 0000 C CNN
+F 3 "" H 2450 4050 60 0000 C CNN
+ 15 2450 4050
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 6298F2EA
+P 2450 3500
+F 0 "U1" H 2500 3600 30 0000 C CNN
+F 1 "PORT" H 2450 3500 30 0000 C CNN
+F 2 "" H 2450 3500 60 0000 C CNN
+F 3 "" H 2450 3500 60 0000 C CNN
+ 7 2450 3500
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 6298F38C
+P 2450 2950
+F 0 "U1" H 2500 3050 30 0000 C CNN
+F 1 "PORT" H 2450 2950 30 0000 C CNN
+F 2 "" H 2450 2950 60 0000 C CNN
+F 3 "" H 2450 2950 60 0000 C CNN
+ 6 2450 2950
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 6298F3CD
+P 2450 2450
+F 0 "U1" H 2500 2550 30 0000 C CNN
+F 1 "PORT" H 2450 2450 30 0000 C CNN
+F 2 "" H 2450 2450 60 0000 C CNN
+F 3 "" H 2450 2450 60 0000 C CNN
+ 5 2450 2450
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 6298F420
+P 2450 2000
+F 0 "U1" H 2500 2100 30 0000 C CNN
+F 1 "PORT" H 2450 2000 30 0000 C CNN
+F 2 "" H 2450 2000 60 0000 C CNN
+F 3 "" H 2450 2000 60 0000 C CNN
+ 4 2450 2000
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 6298FEA6
+P 4950 5800
+F 0 "U1" H 5000 5900 30 0000 C CNN
+F 1 "PORT" H 4950 5800 30 0000 C CNN
+F 2 "" H 4950 5800 60 0000 C CNN
+F 3 "" H 4950 5800 60 0000 C CNN
+ 8 4950 5800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 9 1 62990870
+P 6650 4900
+F 0 "U1" H 6700 5000 30 0000 C CNN
+F 1 "PORT" H 6650 4900 30 0000 C CNN
+F 2 "" H 6650 4900 60 0000 C CNN
+F 3 "" H 6650 4900 60 0000 C CNN
+ 9 6650 4900
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 10 1 62990AD2
+P 6000 3100
+F 0 "U1" H 6050 3200 30 0000 C CNN
+F 1 "PORT" H 6000 3100 30 0000 C CNN
+F 2 "" H 6000 3100 60 0000 C CNN
+F 3 "" H 6000 3100 60 0000 C CNN
+ 10 6000 3100
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 11 1 62990B25
+P 5900 2850
+F 0 "U1" H 5950 2950 30 0000 C CNN
+F 1 "PORT" H 5900 2850 30 0000 C CNN
+F 2 "" H 5900 2850 60 0000 C CNN
+F 3 "" H 5900 2850 60 0000 C CNN
+ 11 5900 2850
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 12 1 62990C76
+P 7750 4550
+F 0 "U1" H 7800 4650 30 0000 C CNN
+F 1 "PORT" H 7750 4550 30 0000 C CNN
+F 2 "" H 7750 4550 60 0000 C CNN
+F 3 "" H 7750 4550 60 0000 C CNN
+ 12 7750 4550
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 13 1 62990CD3
+P 7750 4300
+F 0 "U1" H 7800 4400 30 0000 C CNN
+F 1 "PORT" H 7750 4300 30 0000 C CNN
+F 2 "" H 7750 4300 60 0000 C CNN
+F 3 "" H 7750 4300 60 0000 C CNN
+ 13 7750 4300
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 14 1 62990D95
+P 7800 4000
+F 0 "U1" H 7850 4100 30 0000 C CNN
+F 1 "PORT" H 7800 4000 30 0000 C CNN
+F 2 "" H 7800 4000 60 0000 C CNN
+F 3 "" H 7800 4000 60 0000 C CNN
+ 14 7800 4000
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 16 1 62990E29
+P 7550 2850
+F 0 "U1" H 7600 2950 30 0000 C CNN
+F 1 "PORT" H 7550 2850 30 0000 C CNN
+F 2 "" H 7550 2850 60 0000 C CNN
+F 3 "" H 7550 2850 60 0000 C CNN
+ 16 7550 2850
+ -1 0 0 -1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008.sub b/library/SubcircuitLibrary/CD_4008/CD_4008.sub
new file mode 100644
index 00000000..8f8b1fc1
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008.sub
@@ -0,0 +1,9 @@
+* Subcircuit CD_4008
+.subckt CD_4008 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_
+* c:\fossee\esim\library\subcircuitlibrary\cd_4008\cd_4008.cir
+.include Adder_2bit.sub
+x1 net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad16_ net-_x1-pad17_ Adder_2bit
+x2 net-_u1-pad15_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad8_ net-_x1-pad17_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad16_ net-_u1-pad14_ Adder_2bit
+* Control Statements
+
+.ends CD_4008 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4008/CD_4008_Previous_Values.xml b/library/SubcircuitLibrary/CD_4008/CD_4008_Previous_Values.xml
new file mode 100644
index 00000000..ed759a67
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/CD_4008_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel /><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\Adder_2bit</field></x1><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\Adder_2bit</field></x2></subcircuit></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4008/NMOS-180nm.lib b/library/SubcircuitLibrary/CD_4008/NMOS-180nm.lib
new file mode 100644
index 00000000..51e9b119
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697
++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0
++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3
++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286
++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078
++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/CD_4008/PMOS-180nm.lib b/library/SubcircuitLibrary/CD_4008/PMOS-180nm.lib
new file mode 100644
index 00000000..032b5b95
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9
++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3
++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/library/SubcircuitLibrary/CD_4008/README.md b/library/SubcircuitLibrary/CD_4008/README.md
new file mode 100644
index 00000000..e07f1d56
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/README.md
@@ -0,0 +1,27 @@
+
+# CD4008 IC
+
+CD4008 is 4 bit full adder with parallel carry out IC. It is designed with 180nm CMOS technology in eSim. It is 16 pin IC.
+## Usage/Examples
+
+High Speed Arithmetic operations
+
+Miniature calculators
+
+Counters
+
+Simple logic control designs
+## Documentation
+
+To know the details of CD4008 IC please go through with the documentation : [CD4008_datasheet](https://www.alldatasheet.com/datasheet-pdf/pdf/66388/INTERSIL/CD4008.html)
+
+## Comments/Notes
+
+Please note this is a complete digital IC. It works fine at the time of simulation.
+
+## Contributer
+
+Name: Ankush Mondal
+Email: mondalankush369@gmail.com
+Year: 2022
+Position: FOSSEE Summer Fellow 2022 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4008/analysis b/library/SubcircuitLibrary/CD_4008/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4008/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
generated by cgit (git 2.34.1) at 2024-12-20 12:06:29 +0000