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| author | Sumanto Kar | 2025-02-23 17:20:17 +0530 |
|---|---|---|
| committer | GitHub | 2025-02-23 17:20:17 +0530 |
| commit | ae99d42b8d2ffeaf91f96d5ffbe5efe91214cf0c (patch) | |
| tree | e28be9a5dd152dd76d593ea9541d95305bbb059b /library/SubcircuitLibrary/CD4532B/4_and.sub | |
| parent | 679e6ad8242e09d69576208c9fffaa3694a41b70 (diff) | |
| parent | b712ae83d0802e76c2760e49cc6c03b5eaa190dc (diff) | |
| download | eSim-ae99d42b8d2ffeaf91f96d5ffbe5efe91214cf0c.tar.gz eSim-ae99d42b8d2ffeaf91f96d5ffbe5efe91214cf0c.tar.bz2 eSim-ae99d42b8d2ffeaf91f96d5ffbe5efe91214cf0c.zip | |
Merge pull request #303 from Rachith-H/master
Subcircuit Files for different IC's
Diffstat (limited to 'library/SubcircuitLibrary/CD4532B/4_and.sub')
| -rw-r--r-- | library/SubcircuitLibrary/CD4532B/4_and.sub | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4532B/4_and.sub b/library/SubcircuitLibrary/CD4532B/4_and.sub new file mode 100644 index 00000000..8663f37e --- /dev/null +++ b/library/SubcircuitLibrary/CD4532B/4_and.sub @@ -0,0 +1,12 @@ +* Subcircuit 4_and +.subckt 4_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ +* c:\users\malli\esim\src\subcircuitlibrary\4_and\4_and.cir +.include 3_and.sub +x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ 3_and +* u2 net-_u2-pad1_ net-_u1-pad4_ net-_u1-pad5_ d_and +a1 [net-_u2-pad1_ net-_u1-pad4_ ] net-_u1-pad5_ u2 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Control Statements + +.ends 4_and
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