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| author | Sumanto Kar | 2023-05-04 12:25:41 +0530 |
|---|---|---|
| committer | GitHub | 2023-05-04 12:25:41 +0530 |
| commit | 4f21a7fa863aebf0d44af34417c341d6fc475052 (patch) | |
| tree | c4b7cb04c78c1a334c963a1d4e4d5a6e43f19e58 /library/SubcircuitLibrary/CD4028_B/NOR_Gate.cir | |
| parent | dbebfaea6ae619dfcbfe239bc2cdff07beb57857 (diff) | |
| parent | 0fa7cd5ab4a888272d03ad47d0eabfc9095bbbbb (diff) | |
| download | eSim-4f21a7fa863aebf0d44af34417c341d6fc475052.tar.gz eSim-4f21a7fa863aebf0d44af34417c341d6fc475052.tar.bz2 eSim-4f21a7fa863aebf0d44af34417c341d6fc475052.zip | |
Merge pull request #219 from AnkushECE/master
Sub circuit files for AD620, LM7809, LM386, CD40XX family and CD54HC15X MUX family
Diffstat (limited to 'library/SubcircuitLibrary/CD4028_B/NOR_Gate.cir')
| -rw-r--r-- | library/SubcircuitLibrary/CD4028_B/NOR_Gate.cir | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4028_B/NOR_Gate.cir b/library/SubcircuitLibrary/CD4028_B/NOR_Gate.cir new file mode 100644 index 00000000..51675c6f --- /dev/null +++ b/library/SubcircuitLibrary/CD4028_B/NOR_Gate.cir @@ -0,0 +1,15 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\NOR_Gate\NOR_Gate.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/26/22 11:08:33 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +M2 Net-_M2-Pad1_ Net-_M1-Pad2_ Net-_M2-Pad3_ Net-_M2-Pad3_ eSim_MOS_P +M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M3 Net-_M1-Pad1_ Net-_M3-Pad2_ Net-_M2-Pad1_ Net-_M2-Pad1_ eSim_MOS_P +M4 Net-_M1-Pad1_ Net-_M3-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +U1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M3-Pad2_ Net-_M2-Pad3_ Net-_M1-Pad3_ PORT + +.end |