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| author | Sumanto Kar | 2023-05-04 13:59:44 +0530 |
|---|---|---|
| committer | GitHub | 2023-05-04 13:59:44 +0530 |
| commit | 3d3bef144fc47ac3149a09a4f6f0f04879c7d46d (patch) | |
| tree | e6c8b69d1a58d031e48258cc1cc0c5311a7daf48 /library/SubcircuitLibrary/CD4028_B/AND_Gate.sub | |
| parent | a58c718d43d3d3611bba5b6a67fc811450514a6c (diff) | |
| parent | add82494ea6cdcc8a37609cd54aa0c5e772b2668 (diff) | |
| download | eSim-3d3bef144fc47ac3149a09a4f6f0f04879c7d46d.tar.gz eSim-3d3bef144fc47ac3149a09a4f6f0f04879c7d46d.tar.bz2 eSim-3d3bef144fc47ac3149a09a4f6f0f04879c7d46d.zip | |
Merge branch 'master' into master
Diffstat (limited to 'library/SubcircuitLibrary/CD4028_B/AND_Gate.sub')
| -rw-r--r-- | library/SubcircuitLibrary/CD4028_B/AND_Gate.sub | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4028_B/AND_Gate.sub b/library/SubcircuitLibrary/CD4028_B/AND_Gate.sub new file mode 100644 index 00000000..ad6e1a1e --- /dev/null +++ b/library/SubcircuitLibrary/CD4028_B/AND_Gate.sub @@ -0,0 +1,14 @@ +* Subcircuit AND_Gate +.subckt AND_Gate net-_m5-pad1_ net-_m1-pad2_ net-_m3-pad2_ net-_m1-pad3_ net-_m3-pad3_ +* c:\fossee\esim\library\subcircuitlibrary\and_gate\and_gate.cir +.include PMOS-180nm.lib +.include NMOS-180nm.lib +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m1-pad1_ net-_m1-pad2_ net-_m2-pad3_ net-_m2-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m1-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m3 net-_m2-pad3_ net-_m3-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m5-pad1_ net-_m1-pad1_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad1_ net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +* Control Statements + +.ends AND_Gate
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