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| author | Pranav Karuvally | 2023-05-07 17:06:33 +0530 |
|---|---|---|
| committer | GitHub | 2023-05-07 17:06:33 +0530 |
| commit | 58072b7f39bc7448a32d0f937d2531e4625f9f75 (patch) | |
| tree | 4d513a11d2685a315ad655a23db6ec118829b088 /library/SubcircuitLibrary/CD4028_B/AND_Gate.cir.out | |
| parent | 2de5fa0604c35a1508bca8bab318724da823633a (diff) | |
| parent | b145afdb869564df4131f0b0b472116ca744ef65 (diff) | |
| download | eSim-58072b7f39bc7448a32d0f937d2531e4625f9f75.tar.gz eSim-58072b7f39bc7448a32d0f937d2531e4625f9f75.tar.bz2 eSim-58072b7f39bc7448a32d0f937d2531e4625f9f75.zip | |
Merge branch 'FOSSEE:master' into master
Diffstat (limited to 'library/SubcircuitLibrary/CD4028_B/AND_Gate.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/CD4028_B/AND_Gate.cir.out | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4028_B/AND_Gate.cir.out b/library/SubcircuitLibrary/CD4028_B/AND_Gate.cir.out new file mode 100644 index 00000000..bea80ad4 --- /dev/null +++ b/library/SubcircuitLibrary/CD4028_B/AND_Gate.cir.out @@ -0,0 +1,20 @@ +* c:\fossee\esim\library\subcircuitlibrary\and_gate\and_gate.cir + +.include PMOS-180nm.lib +.include NMOS-180nm.lib +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m1-pad1_ net-_m1-pad2_ net-_m2-pad3_ net-_m2-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m1-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m3 net-_m2-pad3_ net-_m3-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m5-pad1_ net-_m1-pad1_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad1_ net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +* u1 net-_m5-pad1_ net-_m1-pad2_ net-_m3-pad2_ net-_m1-pad3_ net-_m3-pad3_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |