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authorAditya Minocha2024-08-26 00:25:40 +0530
committerGitHub2024-08-26 00:25:40 +0530
commit044059f99adcc13c41252126c12cc6f7bbed6b5f (patch)
tree1204222bc15c9c0a8619411fb6cc9d070e045947 /library/SubcircuitLibrary/CD4027B_IC/OR.cir.out
parentbd79f23e5034fd1a39a5d879057f842ae7747768 (diff)
downloadeSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.tar.gz
eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.tar.bz2
eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.zip
CD4027B - CMOS Dual JK Flip Flop (failed)
Diffstat (limited to 'library/SubcircuitLibrary/CD4027B_IC/OR.cir.out')
-rw-r--r--library/SubcircuitLibrary/CD4027B_IC/OR.cir.out20
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diff --git a/library/SubcircuitLibrary/CD4027B_IC/OR.cir.out b/library/SubcircuitLibrary/CD4027B_IC/OR.cir.out
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+* c:\fossee\esim\library\subcircuitlibrary\or\or.cir
+
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m4 net-_m1-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m5-pad1_ net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m3 net-_m2-pad3_ net-_m3-pad2_ net-_m1-pad1_ net-_m2-pad3_ CMOSP W=100u L=100u M=1
+m2 net-_m2-pad1_ net-_m1-pad2_ net-_m2-pad3_ net-_m2-pad1_ CMOSP W=100u L=100u M=1
+m6 net-_m2-pad1_ net-_m1-pad1_ net-_m5-pad1_ net-_m2-pad1_ CMOSP W=100u L=100u M=1
+* u1 net-_m1-pad2_ net-_m3-pad2_ net-_m5-pad1_ net-_m2-pad1_ net-_m1-pad3_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end