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| author | Aditya Minocha | 2024-08-26 00:25:40 +0530 |
|---|---|---|
| committer | GitHub | 2024-08-26 00:25:40 +0530 |
| commit | 044059f99adcc13c41252126c12cc6f7bbed6b5f (patch) | |
| tree | 1204222bc15c9c0a8619411fb6cc9d070e045947 /library/SubcircuitLibrary/CD4027B_IC/CD4027B_JK_FF.cir | |
| parent | bd79f23e5034fd1a39a5d879057f842ae7747768 (diff) | |
| download | eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.tar.gz eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.tar.bz2 eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.zip | |
CD4027B - CMOS Dual JK Flip Flop (failed)
Diffstat (limited to 'library/SubcircuitLibrary/CD4027B_IC/CD4027B_JK_FF.cir')
| -rw-r--r-- | library/SubcircuitLibrary/CD4027B_IC/CD4027B_JK_FF.cir | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4027B_IC/CD4027B_JK_FF.cir b/library/SubcircuitLibrary/CD4027B_IC/CD4027B_JK_FF.cir new file mode 100644 index 00000000..0f5f4780 --- /dev/null +++ b/library/SubcircuitLibrary/CD4027B_IC/CD4027B_JK_FF.cir @@ -0,0 +1,35 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD4027B_JK_FF\CD4027B_JK_FF.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/29/24 11:30:10
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1 Net-_U1-Pad2_ Net-_X1-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ BUFFER
+X2 Net-_U1-Pad1_ Net-_X12-Pad1_ Net-_U1-Pad8_ Net-_U1-Pad9_ NOT_Gate
+X3 Net-_U1-Pad3_ Net-_X3-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ NOT_Gate
+X4 Net-_U1-Pad4_ Net-_X11-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ NOT_Gate
+X5 Net-_U1-Pad5_ Net-_M2-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ NOT_Gate
+X6 Net-_M2-Pad2_ Net-_M1-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ NOT_Gate
+X8 Net-_X13-Pad3_ Net-_X8-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ NOT_Gate
+X10 Net-_X10-Pad1_ Net-_X10-Pad2_ Net-_M1-Pad3_ Net-_U1-Pad8_ Net-_U1-Pad9_ AND_Gate
+M2 Net-_M1-Pad1_ Net-_M2-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ mosfet_n
+M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad1_ mosfet_p
+M4 Net-_M3-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad1_ Net-_M1-Pad1_ mosfet_n
+M3 Net-_M3-Pad1_ Net-_M2-Pad2_ Net-_M1-Pad1_ Net-_M3-Pad1_ mosfet_p
+M6 Net-_M5-Pad1_ Net-_M1-Pad2_ Net-_M5-Pad3_ Net-_M5-Pad3_ mosfet_n
+M5 Net-_M5-Pad1_ Net-_M2-Pad2_ Net-_M5-Pad3_ Net-_M5-Pad1_ mosfet_p
+M8 Net-_M7-Pad1_ Net-_M2-Pad2_ Net-_M5-Pad1_ Net-_M5-Pad1_ mosfet_n
+M7 Net-_M7-Pad1_ Net-_M1-Pad2_ Net-_M5-Pad1_ Net-_M7-Pad1_ mosfet_p
+X14 Net-_X13-Pad3_ Net-_U1-Pad6_ Net-_U1-Pad8_ Net-_U1-Pad9_ BUFFER
+X15 Net-_M7-Pad1_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ BUFFER
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ PORT
+X11 Net-_M1-Pad1_ Net-_X11-Pad2_ Net-_M5-Pad3_ Net-_U1-Pad8_ Net-_U1-Pad9_ NAND_Gate
+X12 Net-_X12-Pad1_ Net-_M5-Pad3_ Net-_M3-Pad1_ Net-_U1-Pad8_ Net-_U1-Pad9_ NAND_Gate
+X13 Net-_X12-Pad1_ Net-_M5-Pad1_ Net-_X13-Pad3_ Net-_U1-Pad8_ Net-_U1-Pad9_ NAND_Gate
+X16 Net-_X13-Pad3_ Net-_X11-Pad2_ Net-_M7-Pad1_ Net-_U1-Pad8_ Net-_U1-Pad9_ NAND_Gate
+X9 Net-_X8-Pad2_ Net-_X3-Pad2_ Net-_X10-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ OR_Gate
+X7 Net-_X1-Pad2_ Net-_X13-Pad3_ Net-_X10-Pad1_ Net-_U1-Pad8_ Net-_U1-Pad9_ OR_Gate
+
+.end
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