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| author | Aditya Minocha | 2024-08-26 00:25:40 +0530 |
|---|---|---|
| committer | GitHub | 2024-08-26 00:25:40 +0530 |
| commit | 044059f99adcc13c41252126c12cc6f7bbed6b5f (patch) | |
| tree | 1204222bc15c9c0a8619411fb6cc9d070e045947 /library/SubcircuitLibrary/CD4027B_IC/CD4027B_IC.cir.out | |
| parent | bd79f23e5034fd1a39a5d879057f842ae7747768 (diff) | |
| download | eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.tar.gz eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.tar.bz2 eSim-044059f99adcc13c41252126c12cc6f7bbed6b5f.zip | |
CD4027B - CMOS Dual JK Flip Flop (failed)
Diffstat (limited to 'library/SubcircuitLibrary/CD4027B_IC/CD4027B_IC.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/CD4027B_IC/CD4027B_IC.cir.out | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4027B_IC/CD4027B_IC.cir.out b/library/SubcircuitLibrary/CD4027B_IC/CD4027B_IC.cir.out new file mode 100644 index 00000000..ad7b8525 --- /dev/null +++ b/library/SubcircuitLibrary/CD4027B_IC/CD4027B_IC.cir.out @@ -0,0 +1,23 @@ +* c:\users\aditya\esim-workspace\cd4027b_ic\cd4027b_ic.cir
+
+.include CD4027B_IC.sub
+v1 j1 gnd pulse(5 5 0 1u 1u 5m 5m)
+v2 clk gnd pulse(0 5 0 1u 1u 5m 10m)
+v4 k1 gnd pulse(5 5 0 1u 1u 5m 5m)
+v6 k2 gnd pulse(5 5 0 1u 1u 5m 5m)
+v5 j2 gnd pulse(5 5 0 1u 1u 5m 5m)
+r1 q2 gnd 1000k
+r2 qb1 gnd 1000k
+v3 net-_x1-pad16_ gnd dc 5
+x1 q2 qb2 qb1 gnd k2 j2 gnd gnd gnd j1 k1 gnd clk qb1 q1 net-_x1-pad16_ CD4027B_IC
+r4 qb2 gnd 1000k
+r3 gnd q1 1000k
+.tran 0.01e-03 60e-03 0e-03
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
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