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authorSumanto Kar2024-09-13 00:56:13 +0530
committerGitHub2024-09-13 00:56:13 +0530
commit5f80292f451abd9c96849a277ec46670cd1446bc (patch)
tree04624e7c09a326566fdd636111d40e8b79ea008f /library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.sub
parent7bc70caee91be4bc9d9a5c9de60f0260a1f968ae (diff)
parent01402cb91cccafd37a68af636e1cab58eb5a230c (diff)
downloadeSim-5f80292f451abd9c96849a277ec46670cd1446bc.tar.gz
eSim-5f80292f451abd9c96849a277ec46670cd1446bc.tar.bz2
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Merge pull request #280 from AdityaMino/eSim_subckt.lib
eSim_Subckt.lib and Subcircuit Files of other ICs(Contributor: Aditya Minocha)
Diffstat (limited to 'library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.sub')
-rw-r--r--library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.sub9
1 files changed, 9 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.sub b/library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.sub
new file mode 100644
index 00000000..f6379b2c
--- /dev/null
+++ b/library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.sub
@@ -0,0 +1,9 @@
+* Subcircuit CA3240_IC
+.subckt CA3240_IC net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_
+* c:\fossee\esim\library\subcircuitlibrary\ca3240_ic\ca3240_ic.cir
+.include CA3240_OP.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad5_ net-_u1-pad4_ CA3240_OP
+x2 net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad5_ net-_u1-pad4_ CA3240_OP
+* Control Statements
+
+.ends CA3240_IC \ No newline at end of file