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author | Aditya Minocha | 2024-08-25 19:12:57 +0530 |
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committer | GitHub | 2024-08-25 19:12:57 +0530 |
commit | 55568c864d1f19971c15c27df999ea161a07f366 (patch) | |
tree | 8ef67774e10f3ea708e227439feee65d255effda /library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.cir.out | |
parent | b95d015bd1b09a444b9297625c3290ab105517ac (diff) | |
download | eSim-55568c864d1f19971c15c27df999ea161a07f366.tar.gz eSim-55568c864d1f19971c15c27df999ea161a07f366.tar.bz2 eSim-55568c864d1f19971c15c27df999ea161a07f366.zip |
CA3240 IC - Dual Operational Amplifier
Diffstat (limited to 'library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.cir.out')
-rw-r--r-- | library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.cir.out | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.cir.out b/library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.cir.out new file mode 100644 index 00000000..c7c87353 --- /dev/null +++ b/library/SubcircuitLibrary/CA3240_IC_Test/CA3240_IC.cir.out @@ -0,0 +1,15 @@ +* c:\fossee\esim\library\subcircuitlibrary\ca3240_ic\ca3240_ic.cir
+
+.include CA3240_OP.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad5_ net-_u1-pad4_ CA3240_OP
+x2 net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad5_ net-_u1-pad4_ CA3240_OP
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
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