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authorSumanto Kar2023-05-04 13:59:44 +0530
committerGitHub2023-05-04 13:59:44 +0530
commit3d3bef144fc47ac3149a09a4f6f0f04879c7d46d (patch)
treee6c8b69d1a58d031e48258cc1cc0c5311a7daf48 /library/SubcircuitLibrary/74V1G14/74V1G14.cir
parenta58c718d43d3d3611bba5b6a67fc811450514a6c (diff)
parentadd82494ea6cdcc8a37609cd54aa0c5e772b2668 (diff)
downloadeSim-3d3bef144fc47ac3149a09a4f6f0f04879c7d46d.tar.gz
eSim-3d3bef144fc47ac3149a09a4f6f0f04879c7d46d.tar.bz2
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Merge branch 'master' into master
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+* C:\FOSSEE\eSim\library\SubcircuitLibrary\74V1G14\74V1G14.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 8/3/2022 1:17:12 AM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M1 /Vout /Inp Net-_M1-Pad3_ /GND mosfet_n
+M2 Net-_M1-Pad3_ /Inp /GND /GND mosfet_n
+M3 /Vcc /Inp Net-_M3-Pad3_ /Vcc mosfet_p
+M4 Net-_M3-Pad3_ /Inp /Vout /Vcc mosfet_p
+M5 /GND /Vout Net-_M3-Pad3_ /Vcc mosfet_p
+M6 /Vcc /Vout Net-_M1-Pad3_ /GND mosfet_n
+U1 ? /Inp /GND /Vout /Vcc PORT
+
+.end