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| author | Rachith-H | 2025-02-22 19:43:09 +0530 |
|---|---|---|
| committer | Rachith-H | 2025-02-22 19:43:09 +0530 |
| commit | 1ad2e9d32d9b811d38e3f6ab63fb76d97030c293 (patch) | |
| tree | 8aaeff9d60927c510ef76a8fcede6b89eaaf1b92 /library/SubcircuitLibrary/74F350/3_and.cir.out | |
| parent | 679e6ad8242e09d69576208c9fffaa3694a41b70 (diff) | |
| download | eSim-1ad2e9d32d9b811d38e3f6ab63fb76d97030c293.tar.gz eSim-1ad2e9d32d9b811d38e3f6ab63fb76d97030c293.tar.bz2 eSim-1ad2e9d32d9b811d38e3f6ab63fb76d97030c293.zip | |
74F350 is a 4-bit shifter
Diffstat (limited to 'library/SubcircuitLibrary/74F350/3_and.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/74F350/3_and.cir.out | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/74F350/3_and.cir.out b/library/SubcircuitLibrary/74F350/3_and.cir.out new file mode 100644 index 00000000..d7cf79a0 --- /dev/null +++ b/library/SubcircuitLibrary/74F350/3_and.cir.out @@ -0,0 +1,20 @@ +* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir + +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and +* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port +a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |