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| author | Aditya Minocha | 2024-08-25 21:18:14 +0530 |
|---|---|---|
| committer | GitHub | 2024-08-25 21:18:14 +0530 |
| commit | 067aae221f6de9c59d2bee8c6e695e9936c9be87 (patch) | |
| tree | 5233e86b577085b28c358fde685ead9f3bd140dc /library/SRAM/SRAM.proj | |
| parent | 15dbfc6cc1f87e3d2b9dc6571e659a58b3fe621c (diff) | |
| download | eSim-067aae221f6de9c59d2bee8c6e695e9936c9be87.tar.gz eSim-067aae221f6de9c59d2bee8c6e695e9936c9be87.tar.bz2 eSim-067aae221f6de9c59d2bee8c6e695e9936c9be87.zip | |
Static Memory - 6T SRAM Cell
Diffstat (limited to 'library/SRAM/SRAM.proj')
| -rw-r--r-- | library/SRAM/SRAM.proj | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/library/SRAM/SRAM.proj b/library/SRAM/SRAM.proj new file mode 100644 index 00000000..5e174fd0 --- /dev/null +++ b/library/SRAM/SRAM.proj @@ -0,0 +1 @@ +schematicFile SRAM.sch
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