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author | rahulp13 | 2021-01-07 07:55:48 +0530 |
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committer | rahulp13 | 2021-01-07 07:55:48 +0530 |
commit | 088203b088a02eabb4606dc734e901b81f237b11 (patch) | |
tree | ebe9109661a149c82fc66599a6ce8103637d0b4a /Windows/spice/examples/xspice/fstest.sp | |
parent | ac223c4a69c701ad0a247401acdc48b8b6b6dba6 (diff) | |
download | eSim-088203b088a02eabb4606dc734e901b81f237b11.tar.gz eSim-088203b088a02eabb4606dc734e901b81f237b11.tar.bz2 eSim-088203b088a02eabb4606dc734e901b81f237b11.zip |
removed outdated dependencies
Diffstat (limited to 'Windows/spice/examples/xspice/fstest.sp')
-rw-r--r-- | Windows/spice/examples/xspice/fstest.sp | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/Windows/spice/examples/xspice/fstest.sp b/Windows/spice/examples/xspice/fstest.sp deleted file mode 100644 index f0f552a8..00000000 --- a/Windows/spice/examples/xspice/fstest.sp +++ /dev/null @@ -1,26 +0,0 @@ -* filesource Test - -* two differential ports 1 0 and 3 0 are used, so your input file -* has to have three columns (time, port_value 1, portvalue 2) - -AFILESRC %vd([1 0 3 0]) filesrc -.model filesrc filesource (file="sine.m" amploffset=[0 0] amplscale=[1 1] timerelative=false amplstep=false) - -V2 2 0 0.0 SIN(0 1 1MEG 0 0 0.0) -V4 4 0 0.0 SIN(0 1 1MEG 0 0 90.0) - -.tran 1n 1.0u - -.control -run -*listing param -wrdata vspice V(1) V(2) V(3) V(4) - - -plot V(1) V(2) V(3) V(4) - -* error between interpolation and sine source -* should be less than 1mV up to 1us -plot V(1,2) V(3,4) -.endc -.end |