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author | rahulp13 | 2020-02-28 11:38:58 +0530 |
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committer | rahulp13 | 2020-02-28 11:38:58 +0530 |
commit | 246319682f60293b132fca1ce6e24689c6682617 (patch) | |
tree | 6871b758a17869efecfd617f5513e31f9a933f4a /Windows/spice/examples/various/param_sweep.cir | |
parent | d9ab84106cac311d953f344386fef1c1e2bca1cf (diff) | |
download | eSim-246319682f60293b132fca1ce6e24689c6682617.tar.gz eSim-246319682f60293b132fca1ce6e24689c6682617.tar.bz2 eSim-246319682f60293b132fca1ce6e24689c6682617.zip |
initial commit
Diffstat (limited to 'Windows/spice/examples/various/param_sweep.cir')
-rw-r--r-- | Windows/spice/examples/various/param_sweep.cir | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Windows/spice/examples/various/param_sweep.cir b/Windows/spice/examples/various/param_sweep.cir new file mode 100644 index 00000000..79d5869e --- /dev/null +++ b/Windows/spice/examples/various/param_sweep.cir @@ -0,0 +1,29 @@ +parameter sweep +* resistive divider, R1 swept from start_r to stop_r +* replaces .STEP R1 1k 10k 1k +* chapter 16.13.4.2 + +R1 1 2 1k +R2 2 0 1k + +VDD 1 0 DC 1 +.dc VDD 0 1 .1 + +.control +let start_r = 1k +let stop_r = 10k +let delta_r = 1k +let r_act = start_r +* loop +while r_act le stop_r + alter r1 r_act + run + write dc-sweep.out v(2) + set appendwrite + let r_act = r_act + delta_r +end +plot dc1.v(2) dc2.v(2) dc3.v(2) dc4.v(2) dc5.v(2) ++ dc6.v(2) dc7.v(2) dc8.v(2) dc9.v(2) dc10.v(2) +.endc + +.end |