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author | rahulp13 | 2020-02-28 11:38:58 +0530 |
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committer | rahulp13 | 2020-02-28 11:38:58 +0530 |
commit | 246319682f60293b132fca1ce6e24689c6682617 (patch) | |
tree | 6871b758a17869efecfd617f5513e31f9a933f4a /Windows/spice/examples/pss/ring_osc_pss.cir | |
parent | d9ab84106cac311d953f344386fef1c1e2bca1cf (diff) | |
download | eSim-246319682f60293b132fca1ce6e24689c6682617.tar.gz eSim-246319682f60293b132fca1ce6e24689c6682617.tar.bz2 eSim-246319682f60293b132fca1ce6e24689c6682617.zip |
initial commit
Diffstat (limited to 'Windows/spice/examples/pss/ring_osc_pss.cir')
-rw-r--r-- | Windows/spice/examples/pss/ring_osc_pss.cir | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Windows/spice/examples/pss/ring_osc_pss.cir b/Windows/spice/examples/pss/ring_osc_pss.cir new file mode 100644 index 00000000..d2649605 --- /dev/null +++ b/Windows/spice/examples/pss/ring_osc_pss.cir @@ -0,0 +1,29 @@ +Ring CMOS Oscillator +* Oscillation is taken on node "bout". +* Predicted frequency is 3.8e+09 Hz. +* +* PLOT bout + +* Supply +vdd vdd gnd 1.2 pwl 0 1.2 1e-9 1.2 +rdd vdd vdd_ana 70m +rgnd gnd gnd_ana 70m + +* Inverter +mp1 inv1 inv3 vdd_ana vdd_ana pch w=10u l=0.18u +mn1 inv1 inv3 gnd_ana gnd_ana nch w=10u l=0.18u +mp2 inv2 inv1 vdd_ana vdd_ana pch w=10u l=0.18u +mn2 inv2 inv1 gnd_ana gnd_ana nch w=10u l=0.18u +mp3 inv3 inv2 vdd_ana vdd_ana pch w=10u l=0.18u +mn3 inv3 inv2 gnd_ana gnd_ana nch w=10u l=0.18u + +* Buffer out +mp4 bout inv3 vdd_ana vdd_ana pch w=10u l=0.18u +mn4 bout inv3 gnd_ana gnd_ana nch w=10u l=0.18u + +.model nch nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u ) +.model pch pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u ) + +*.tran 0.005n 100n +*.plot tran v(4) +.pss 624e6 500n 1 1024 10 5 5e-3 uic |