diff options
| author | rahulp13 | 2021-01-07 18:22:29 +0530 |
|---|---|---|
| committer | rahulp13 | 2021-01-07 18:22:29 +0530 |
| commit | d4fd47ecf77597595d3f4fa72fd5334a5fe7417b (patch) | |
| tree | 28095229ec3035d15c569fbedac83cf5876aa196 /Windows/spice/examples/cider/resistor/sires.cir | |
| parent | 376e748df438933088721286402462dffd6367c0 (diff) | |
| parent | 63e3156454f39732a3101c29d42b473a89ca68d2 (diff) | |
| download | eSim-d4fd47ecf77597595d3f4fa72fd5334a5fe7417b.tar.gz eSim-d4fd47ecf77597595d3f4fa72fd5334a5fe7417b.tar.bz2 eSim-d4fd47ecf77597595d3f4fa72fd5334a5fe7417b.zip | |
Merge windows installer updates with linux installer
Diffstat (limited to 'Windows/spice/examples/cider/resistor/sires.cir')
| -rw-r--r-- | Windows/spice/examples/cider/resistor/sires.cir | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/Windows/spice/examples/cider/resistor/sires.cir b/Windows/spice/examples/cider/resistor/sires.cir deleted file mode 100644 index 45e2aa12..00000000 --- a/Windows/spice/examples/cider/resistor/sires.cir +++ /dev/null @@ -1,26 +0,0 @@ -Silicon Resistor - -* This simulation demonstrates the effects of velocity saturation at -* high lateral electric fields. - -VPP 1 0 10v PWL 0s 0.0v 100s 10v -VNN 2 0 0.0v -D1 1 2 M_RES AREA=1 - -.MODEL M_RES numd level=1 -+ options resistor defa=1p -+ x.mesh loc=0.0 num=1 -+ x.mesh loc=1.0 num=101 -+ domain num=1 material=1 -+ material num=1 silicon -+ doping unif n.type conc=2.5e16 -+ models bgn srh conctau auger concmob fieldmob -+ method ac=direct - -*.OP -.DC VPP 0.0v 10.01v 0.1v -*.TRAN 1s 100.001s 0s 0.2s -.PRINT I(VPP) - -.OPTION ACCT BYPASS=1 RELTOL=1e-12 -.END |