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| author | Fahim | 2015-12-30 12:20:39 +0530 |
|---|---|---|
| committer | Fahim | 2015-12-30 12:20:39 +0530 |
| commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
| tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/fullwaverec/scr.cir | |
| parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
| download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip | |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/fullwaverec/scr.cir')
| -rw-r--r-- | Examples/fullwaverec/scr.cir | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Examples/fullwaverec/scr.cir b/Examples/fullwaverec/scr.cir new file mode 100644 index 00000000..7a6fdc1c --- /dev/null +++ b/Examples/fullwaverec/scr.cir @@ -0,0 +1,20 @@ +* /opt/eSim/src/SubcircuitLibrary/scr/scr.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Dec 4 15:10:34 2015 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 3 5 1 PORT +F2 3 4 2 3 100 +D1 8 2 D +C1 3 4 10u +R2 3 4 1 +F1 3 4 7 3 10 +R1 5 6 50 +v1 6 7 dc +v2 9 8 dc +U1 4 1 9 aswitch + +.end |