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authorFahim2015-12-30 12:31:05 +0530
committerFahim2015-12-30 12:31:05 +0530
commit206afcded42d55572509e3439d752c9a81c84785 (patch)
tree73ef64eda8504c27d6f1a3b1e141ee8d6efbbbe8 /Examples/fullwaverec/fullwaverec.cir
parent06036bffa314d41f31cbdcd6883c9b3558930326 (diff)
downloadeSim-206afcded42d55572509e3439d752c9a81c84785.tar.gz
eSim-206afcded42d55572509e3439d752c9a81c84785.tar.bz2
eSim-206afcded42d55572509e3439d752c9a81c84785.zip
Added :
1. Power Examples 2. eSim_Power.lib 3. DeviceModel for Powerdiode and Zenerdiode 4. Subcicuit for scr, diac, triac
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+* /home/fossee/Downloads/powercktexamples/fullwaverec/fullwaverec.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Dec 4 15:43:40 2015
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+x1 GND pulse out2 SCR
+v1 in1 in2 sine
+v2 pulse GND pulse
+D1 in1 out1 D
+D3 in2 out1 D
+D2 GND in1 D
+D4 GND in2 D
+R1 out1 out2 100
+
+.end