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authorFahim2015-12-30 12:31:05 +0530
committerFahim2015-12-30 12:31:05 +0530
commit206afcded42d55572509e3439d752c9a81c84785 (patch)
tree73ef64eda8504c27d6f1a3b1e141ee8d6efbbbe8 /Examples/acvoltcnt1/diac.sub~
parent06036bffa314d41f31cbdcd6883c9b3558930326 (diff)
downloadeSim-206afcded42d55572509e3439d752c9a81c84785.tar.gz
eSim-206afcded42d55572509e3439d752c9a81c84785.tar.bz2
eSim-206afcded42d55572509e3439d752c9a81c84785.zip
Added :
1. Power Examples 2. eSim_Power.lib 3. DeviceModel for Powerdiode and Zenerdiode 4. Subcicuit for scr, diac, triac
Diffstat (limited to 'Examples/acvoltcnt1/diac.sub~')
-rw-r--r--Examples/acvoltcnt1/diac.sub~18
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diff --git a/Examples/acvoltcnt1/diac.sub~ b/Examples/acvoltcnt1/diac.sub~
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+* Subcircuit diac
+.subckt diac 1 2
+* /opt/esim/src/subcircuitlibrary/diac/diac.cir
+* u1 1 1 2 aswitch
+* u2 1 1 2 aswitch
+a1 1 [1 2 ] u1
+a2 1 [1 2 ] u2
+* Schematic Name: aswitch, NgSpice Name: aswitch
+.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 )
+* Schematic Name: aswitch, NgSpice Name: aswitch
+.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 )
+* Schematic Name: aswitch, NgSpice Name: aswitch
+.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 )
+* Schematic Name: aswitch, NgSpice Name: aswitch
+.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 )
+* Control Statements
+
+.ends diac \ No newline at end of file