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| author | Fahim | 2015-12-30 12:20:39 +0530 |
|---|---|---|
| committer | Fahim | 2015-12-30 12:20:39 +0530 |
| commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
| tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/acvoltcnt1/acvoltcnt1.cir.out | |
| parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
| download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip | |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/acvoltcnt1/acvoltcnt1.cir.out')
| -rw-r--r-- | Examples/acvoltcnt1/acvoltcnt1.cir.out | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Examples/acvoltcnt1/acvoltcnt1.cir.out b/Examples/acvoltcnt1/acvoltcnt1.cir.out new file mode 100644 index 00000000..2ab1c917 --- /dev/null +++ b/Examples/acvoltcnt1/acvoltcnt1.cir.out @@ -0,0 +1,29 @@ +* /home/fossee/downloads/powercktexamples/acvoltcnt1/acvoltcnt1.cir + +.include triac.sub +.include diac.sub +c2 net-_c2-pad1_ gnd 0.1u +c1 net-_c1-pad1_ gnd 0.1u +r3 net-_c1-pad1_ net-_c2-pad1_ 250 +r2 in net-_c1-pad1_ 10k +r1 in out 100 +v1 in gnd sine(0 100 100 0 0) +x2 gnd out net-_x1-pad2_ triac +x1 net-_c2-pad1_ net-_x1-pad2_ diac +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) +.tran 20e-06 20e-03 0e-12 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |