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| author | rahulp13 | 2020-02-14 15:16:35 +0530 |
|---|---|---|
| committer | rahulp13 | 2020-02-14 15:16:35 +0530 |
| commit | cb55e59de7ee4383c04edfae7c39ad9ae9552b36 (patch) | |
| tree | de1b292a10e8196689bf1a208fe6fe32f4618846 /Examples/UJT_Relaxation_Oscillator/ujt.cir | |
| parent | 08d4a0336550a0e610709970a0c5d366e109fe82 (diff) | |
| download | eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.gz eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.bz2 eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.zip | |
common code for Win and Linux, merged py2 changes
Diffstat (limited to 'Examples/UJT_Relaxation_Oscillator/ujt.cir')
| -rw-r--r-- | Examples/UJT_Relaxation_Oscillator/ujt.cir | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Examples/UJT_Relaxation_Oscillator/ujt.cir b/Examples/UJT_Relaxation_Oscillator/ujt.cir new file mode 100644 index 00000000..6bdab774 --- /dev/null +++ b/Examples/UJT_Relaxation_Oscillator/ujt.cir @@ -0,0 +1,18 @@ +* /home/saurabh/Downloads/eSim-1.1.2/src/SubcircuitLibrary/ujt/ujt.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Aug 26 17:18:46 2019 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +R3 Net-_H1-Pad2_ Net-_H1-Pad1_ 1000k +H1 Net-_H1-Pad1_ Net-_H1-Pad2_ Net-_D1-Pad2_ Net-_B1-Pad1_ 1k +C1 Net-_B1-Pad1_ Net-_B1-Pad2_ 35p +R1 Net-_B1-Pad2_ Net-_R1-Pad2_ 38.15k +R2 Net-_R2-Pad1_ Net-_B1-Pad1_ 2.518k +U1 Net-_D1-Pad1_ Net-_R1-Pad2_ Net-_R2-Pad1_ PORT +B1 Net-_B1-Pad1_ Net-_B1-Pad2_ I=0.00028*V(5,7)+0.00575*V(5,7)*V(6) +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode + +.end |