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| author | Rahul P | 2020-01-01 14:08:26 +0530 |
|---|---|---|
| committer | GitHub | 2020-01-01 14:08:26 +0530 |
| commit | 513282e2f884bec1cca836fe1cfe5345f85a692c (patch) | |
| tree | ad421a5422c57d5eb61ca55cd6e698ff99ba7dbb /Examples/NGHDL_Examples/Cmosinverter/inverter.vhdl | |
| parent | f2263c34e0cec4d3dd8b278a4bf5cd430efab1bd (diff) | |
| parent | b4b698c2b11a9222ad8dbcebbbce19ccf34a266d (diff) | |
| download | eSim-1.1.3.tar.gz eSim-1.1.3.tar.bz2 eSim-1.1.3.zip | |
Merge pull request #129 from rahulp13/masterv1.1.3
removed extra files
Diffstat (limited to 'Examples/NGHDL_Examples/Cmosinverter/inverter.vhdl')
| -rw-r--r-- | Examples/NGHDL_Examples/Cmosinverter/inverter.vhdl | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/Examples/NGHDL_Examples/Cmosinverter/inverter.vhdl b/Examples/NGHDL_Examples/Cmosinverter/inverter.vhdl deleted file mode 100644 index 8a6b638e..00000000 --- a/Examples/NGHDL_Examples/Cmosinverter/inverter.vhdl +++ /dev/null @@ -1,12 +0,0 @@ -library ieee; -use ieee.std_logic_1164.all; - -entity inverter is - port ( i: in std_logic_vector(0 downto 0); - o: out std_logic_vector(0 downto 0)); -end inverter; - -architecture inverter_beh of inverter is -begin - o <= not i; -end inverter_beh; |