summaryrefslogtreecommitdiff
path: root/Examples/InvertingAmplifier
diff options
context:
space:
mode:
authorSunil Shetye2019-03-11 12:11:24 +0530
committerSunil Shetye2019-07-01 17:41:27 +0530
commit5e116a4676854289fabeb6cce57f3d01ae8f5709 (patch)
tree317985a949497440e3bb98ac07ab0e2a0d5a9a1c /Examples/InvertingAmplifier
parente9064e423b586c2a31926fb5a1e582e8d1f626f8 (diff)
downloadeSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.tar.gz
eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.tar.bz2
eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.zip
remove temporary files
Diffstat (limited to 'Examples/InvertingAmplifier')
-rw-r--r--Examples/InvertingAmplifier/D.lib20
-rw-r--r--Examples/InvertingAmplifier/InvertingAmplifier.bak184
-rw-r--r--Examples/InvertingAmplifier/PowerDiode.lib20
-rw-r--r--Examples/InvertingAmplifier/scr.cir.out~29
-rw-r--r--Examples/InvertingAmplifier/scr.sub~23
-rw-r--r--Examples/InvertingAmplifier/ua741-cache.bak100
-rw-r--r--Examples/InvertingAmplifier/ua741.bak208
-rw-r--r--Examples/InvertingAmplifier/ua741.cir.ckt9
-rw-r--r--Examples/InvertingAmplifier/ua741_Previous_Values.xml1
9 files changed, 0 insertions, 594 deletions
diff --git a/Examples/InvertingAmplifier/D.lib b/Examples/InvertingAmplifier/D.lib
deleted file mode 100644
index ef18bb50..00000000
--- a/Examples/InvertingAmplifier/D.lib
+++ /dev/null
@@ -1,20 +0,0 @@
-.MODEL D1N750 D(
-+ Vj=.75
-+ Nbvl=14.976
-+ Cjo=175p
-+ Rs=.25
-+ Isr=1.859n
-+ Eg=1.11
-+ M=.5516
-+ Nbv=1.6989
-+ N=1
-+ Tbv1=-21.277u
-+ Bv=8.1
-+ Fc=.5
-+ Ikf=0
-+ Nr=2
-+ Ibv=20.245m
-+ Is=880.5E-18
-+ Xti=3
-+ Ibvl=1.9556m
-) \ No newline at end of file
diff --git a/Examples/InvertingAmplifier/InvertingAmplifier.bak b/Examples/InvertingAmplifier/InvertingAmplifier.bak
deleted file mode 100644
index 9b426999..00000000
--- a/Examples/InvertingAmplifier/InvertingAmplifier.bak
+++ /dev/null
@@ -1,184 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L UA741 X1
-U 1 1 56A88D40
-P 6000 3400
-F 0 "X1" H 6150 3400 60 0000 C CNN
-F 1 "UA741" H 6250 3250 60 0000 C CNN
-F 2 "" H 6000 3400 60 0000 C CNN
-F 3 "" H 6000 3400 60 0000 C CNN
- 1 6000 3400
- 1 0 0 1
-$EndComp
-$Comp
-L R R1
-U 1 1 56A88DB5
-P 5250 3350
-F 0 "R1" H 5300 3480 50 0000 C CNN
-F 1 "1k" H 5300 3400 50 0000 C CNN
-F 2 "" H 5300 3330 30 0000 C CNN
-F 3 "" V 5300 3400 30 0000 C CNN
- 1 5250 3350
- 1 0 0 -1
-$EndComp
-$Comp
-L R R2
-U 1 1 56A88DD8
-P 6100 2850
-F 0 "R2" H 6150 2980 50 0000 C CNN
-F 1 "5k" H 6150 2900 50 0000 C CNN
-F 2 "" H 6150 2830 30 0000 C CNN
-F 3 "" V 6150 2900 30 0000 C CNN
- 1 6100 2850
- 1 0 0 -1
-$EndComp
-$Comp
-L sine v1
-U 1 1 56A88E30
-P 4850 3750
-F 0 "v1" H 4650 3850 60 0000 C CNN
-F 1 "sine" H 4650 3700 60 0000 C CNN
-F 2 "R1" H 4550 3750 60 0000 C CNN
-F 3 "" H 4850 3750 60 0000 C CNN
- 1 4850 3750
- 1 0 0 -1
-$EndComp
-$Comp
-L GND #PWR01
-U 1 1 56A88EC6
-P 5600 3850
-F 0 "#PWR01" H 5600 3600 50 0001 C CNN
-F 1 "GND" H 5600 3700 50 0000 C CNN
-F 2 "" H 5600 3850 50 0000 C CNN
-F 3 "" H 5600 3850 50 0000 C CNN
- 1 5600 3850
- 1 0 0 -1
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 56A88F10
-P 4850 4200
-F 0 "#PWR02" H 4850 3950 50 0001 C CNN
-F 1 "GND" H 4850 4050 50 0000 C CNN
-F 2 "" H 4850 4200 50 0000 C CNN
-F 3 "" H 4850 4200 50 0000 C CNN
- 1 4850 4200
- 1 0 0 -1
-$EndComp
-Wire Wire Line
- 4850 3300 5150 3300
-Wire Wire Line
- 5450 3300 5800 3300
-Wire Wire Line
- 6000 2800 5650 2800
-Wire Wire Line
- 5650 2800 5650 3300
-Connection ~ 5650 3300
-Wire Wire Line
- 6550 3400 6900 3400
-Wire Wire Line
- 6700 3400 6700 2800
-Wire Wire Line
- 6700 2800 6300 2800
-Text GLabel 4900 3150 0 60 Input ~ 0
-in
-Wire Wire Line
- 4900 3150 4950 3150
-Wire Wire Line
- 4950 3150 4950 3300
-Connection ~ 4950 3300
-Connection ~ 6700 3400
-$Comp
-L R R3
-U 1 1 56A890CA
-P 7000 3450
-F 0 "R3" H 7050 3580 50 0000 C CNN
-F 1 "1k" H 7050 3500 50 0000 C CNN
-F 2 "" H 7050 3430 30 0000 C CNN
-F 3 "" V 7050 3500 30 0000 C CNN
- 1 7000 3450
- 1 0 0 -1
-$EndComp
-$Comp
-L GND #PWR03
-U 1 1 56A89129
-P 7200 3400
-F 0 "#PWR03" H 7200 3150 50 0001 C CNN
-F 1 "GND" H 7200 3250 50 0000 C CNN
-F 2 "" H 7200 3400 50 0000 C CNN
-F 3 "" H 7200 3400 50 0000 C CNN
- 1 7200 3400
- 1 0 0 -1
-$EndComp
-Text GLabel 6850 3250 1 60 Input ~ 0
-out
-Wire Wire Line
- 6850 3250 6850 3400
-Connection ~ 6850 3400
-$Comp
-L R R4
-U 1 1 56A891BE
-P 5550 3650
-F 0 "R4" H 5600 3780 50 0000 C CNN
-F 1 "1k" H 5600 3700 50 0000 C CNN
-F 2 "" H 5600 3630 30 0000 C CNN
-F 3 "" V 5600 3700 30 0000 C CNN
- 1 5550 3650
- 0 1 1 0
-$EndComp
-Wire Wire Line
- 5800 3500 5600 3500
-Wire Wire Line
- 5600 3500 5600 3550
-$EndSCHEMATC
diff --git a/Examples/InvertingAmplifier/PowerDiode.lib b/Examples/InvertingAmplifier/PowerDiode.lib
deleted file mode 100644
index a2f61dce..00000000
--- a/Examples/InvertingAmplifier/PowerDiode.lib
+++ /dev/null
@@ -1,20 +0,0 @@
-.MODEL PowerDiode D(
-+ Vj=.75
-+ Nbvl=14.976
-+ Cjo=175p
-+ Rs=.25
-+ Isr=1.859n
-+ Eg=1.11
-+ M=.5516
-+ Nbv=1.6989
-+ N=1
-+ Tbv1=-21.277u
-+ bv=1800
-+ Fc=.5
-+ Ikf=0
-+ Nr=2
-+ Ibv=20.245m
-+ Is=2.2E-15
-+ Xti=3
-+ Ibvl=1.9556m
-) \ No newline at end of file
diff --git a/Examples/InvertingAmplifier/scr.cir.out~ b/Examples/InvertingAmplifier/scr.cir.out~
deleted file mode 100644
index d600f25d..00000000
--- a/Examples/InvertingAmplifier/scr.cir.out~
+++ /dev/null
@@ -1,29 +0,0 @@
-* /opt/esim/src/subcircuitlibrary/scr/scr.cir
-
-.include PowerDiode.lib
-* u2 3 7 1 port
-* f2
-d1 5 2 PowerDiode
-c1 3 9 10u
-* f1
-v1 8 4 dc 0
-v2 6 5 dc 0
-* u1 9 1 6 aswitch
-r1 7 8 50
-r2 3 9 1
-Vf2 2 3 0
-f2 3 9 Vf2 100
-Vf1 4 3 0
-f1 3 9 Vf1 10
-a1 9 (1 6) u1
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 )
-.tran 0e-12 0e-00 0e-00
-
-* Control Statements
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/Examples/InvertingAmplifier/scr.sub~ b/Examples/InvertingAmplifier/scr.sub~
deleted file mode 100644
index 0fdddbf4..00000000
--- a/Examples/InvertingAmplifier/scr.sub~
+++ /dev/null
@@ -1,23 +0,0 @@
-* Subcircuit scr
-.subckt scr 3 7 1
-* /opt/esim/src/subcircuitlibrary/scr/scr.cir
-.include PowerDiode.lib
-* f2
-d1 5 2 PowerDiode
-c1 3 9 10u
-* f1
-v1 8 4 dc 0
-v2 6 5 dc 0
-* u1 9 1 6 aswitch
-r1 7 8 50
-r2 3 9 1
-Vf2 2 3 0
-f2 3 9 Vf2 100
-Vf1 4 3 0
-f1 3 9 Vf1 10
-a1 9 [1 6 ] u1
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 )
-* Control Statements
-
-.ends scr \ No newline at end of file
diff --git a/Examples/InvertingAmplifier/ua741-cache.bak b/Examples/InvertingAmplifier/ua741-cache.bak
deleted file mode 100644
index eaad34ad..00000000
--- a/Examples/InvertingAmplifier/ua741-cache.bak
+++ /dev/null
@@ -1,100 +0,0 @@
-EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST
-#encoding utf-8
-#
-# C
-#
-DEF C C 0 10 N Y 1 F N
-F0 "C" 50 100 50 H V L CNN
-F1 "C" 50 -100 50 H V L CNN
-$FPLIST
- SM*
- C?
- C1-1
-$ENDFPLIST
-DRAW
-P 2 0 1 10 -100 -30 100 -30 N
-P 2 0 1 10 -100 30 100 30 N
-X ~ 1 0 200 170 D 40 40 1 1 P
-X ~ 2 0 -200 170 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GND
-#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
-DRAW
-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 8 F N
-F0 "U" 0 -50 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 I
-X ~ 2 250 0 100 L 30 30 2 1 I
-X ~ 3 250 0 100 L 30 30 3 1 I
-X ~ 4 250 0 100 L 30 30 4 1 I
-X ~ 5 250 0 100 L 30 30 5 1 I
-X ~ 6 250 0 100 L 30 30 6 1 I
-X ~ 7 250 0 100 L 30 30 7 1 I
-X ~ 8 250 0 100 L 30 30 8 1 I
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 270 30 H I C CNN
-F1 "PWR_FLAG" 0 230 30 H V C CNN
-DRAW
-X pwr 1 0 0 0 U 20 20 0 0 w
-P 3 0 1 0 0 0 0 100 0 100 N
-P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-$FPLIST
- R?
- SM0603
- SM0805
- R?-*
-$ENDFPLIST
-DRAW
-S -40 150 40 -150 0 1 12 N
-X ~ 1 0 250 100 D 60 60 1 1 P
-X ~ 2 0 -250 100 U 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# VCVS
-#
-DEF VCVS E 0 40 Y Y 1 F N
-F0 "E" -200 100 50 H V C CNN
-F1 "VCVS" -200 -50 50 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-S -100 100 100 -100 0 1 0 N
-X + 1 -300 50 200 R 35 35 1 1 P
-X - 2 300 50 200 L 35 35 1 1 P
-X +c 3 -50 -200 100 U 35 35 1 1 P
-X -c 4 50 -200 100 U 35 35 1 1 P
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/Examples/InvertingAmplifier/ua741.bak b/Examples/InvertingAmplifier/ua741.bak
deleted file mode 100644
index 6be92803..00000000
--- a/Examples/InvertingAmplifier/ua741.bak
+++ /dev/null
@@ -1,208 +0,0 @@
-EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:ua741-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "20 oct 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L PORT U1
-U 3 1 5082C027
-P 6250 2500
-F 0 "U1" H 6250 2450 30 0000 C CNN
-F 1 "PORT" H 6250 2500 30 0000 C CNN
- 3 6250 2500
- -1 0 0 1
-$EndComp
-$Comp
-L PORT U1
-U 1 1 5082C011
-P 2300 3100
-F 0 "U1" H 2300 3050 30 0000 C CNN
-F 1 "PORT" H 2300 3100 30 0000 C CNN
- 1 2300 3100
- 1 0 0 -1
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5082C00B
-P 2250 2600
-F 0 "U1" H 2250 2550 30 0000 C CNN
-F 1 "PORT" H 2250 2600 30 0000 C CNN
- 2 2250 2600
- 1 0 0 -1
-$EndComp
-Connection ~ 3700 3200
-Wire Wire Line
- 3450 3200 3700 3200
-Connection ~ 5000 3300
-Wire Wire Line
- 3700 3300 5250 3300
-Wire Wire Line
- 5250 3300 5250 3200
-Connection ~ 4550 3300
-Wire Wire Line
- 5000 3300 5000 2950
-Connection ~ 3700 3300
-Wire Wire Line
- 4550 3300 4550 3100
-Wire Wire Line
- 3900 2500 3700 2500
-Wire Wire Line
- 3700 2500 3700 2550
-Wire Wire Line
- 3450 2900 3300 2900
-Wire Wire Line
- 3300 2900 3300 3200
-Wire Wire Line
- 3300 3200 2950 3200
-Connection ~ 2950 3100
-Wire Wire Line
- 2950 3200 2950 3100
-Wire Wire Line
- 3000 2600 2500 2600
-Wire Wire Line
- 2550 3100 3000 3100
-Wire Wire Line
- 2950 2600 2950 2500
-Connection ~ 2950 2600
-Wire Wire Line
- 2950 2500 3300 2500
-Wire Wire Line
- 3300 2500 3300 2800
-Wire Wire Line
- 3300 2800 3450 2800
-Wire Wire Line
- 3700 3150 3700 3400
-Wire Wire Line
- 4550 2500 4550 2700
-Wire Wire Line
- 4400 2500 5000 2500
-Wire Wire Line
- 5000 2500 5000 2850
-Connection ~ 4550 2500
-Wire Wire Line
- 5250 2600 5250 2500
-Wire Wire Line
- 5250 2500 5350 2500
-Wire Wire Line
- 5850 2500 6000 2500
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 508152A0
-P 3450 3200
-F 0 "#FLG01" H 3450 3470 30 0001 C CNN
-F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN
- 1 3450 3200
- 1 0 0 -1
-$EndComp
-$Comp
-L R Rout1
-U 1 1 50813F5B
-P 5600 2500
-F 0 "Rout1" V 5680 2500 50 0000 C CNN
-F 1 "75" V 5600 2500 50 0000 C CNN
- 1 5600 2500
- 0 1 1 0
-$EndComp
-$Comp
-L VCVS Eout1
-U 1 1 50813F0F
-P 5200 2900
-F 0 "Eout1" H 5000 3000 50 0000 C CNN
-F 1 "1" H 5000 2850 50 0000 C CNN
- 1 5200 2900
- 0 1 1 0
-$EndComp
-$Comp
-L C Cbw1
-U 1 1 50813EE0
-P 4550 2900
-F 0 "Cbw1" H 4600 3000 50 0000 L CNN
-F 1 "31.85e-9" H 4600 2800 50 0000 L CNN
- 1 4550 2900
- 1 0 0 -1
-$EndComp
-$Comp
-L R Rbw1
-U 1 1 50813EAB
-P 4150 2500
-F 0 "Rbw1" V 4230 2500 50 0000 C CNN
-F 1 "0.5e6" V 4150 2500 50 0000 C CNN
- 1 4150 2500
- 0 1 1 0
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 50813E0D
-P 3700 3400
-F 0 "#PWR02" H 3700 3400 30 0001 C CNN
-F 1 "GND" H 3700 3330 30 0001 C CNN
- 1 3700 3400
- 1 0 0 -1
-$EndComp
-$Comp
-L VCVS Ein1
-U 1 1 50813D7C
-P 3650 2850
-F 0 "Ein1" H 3450 2950 50 0000 C CNN
-F 1 "100e3" H 3450 2800 50 0000 C CNN
- 1 3650 2850
- 0 1 1 0
-$EndComp
-$Comp
-L R Rin1
-U 1 1 50813C57
-P 3000 2850
-F 0 "Rin1" V 3080 2850 50 0000 C CNN
-F 1 "2e6" V 3000 2850 50 0000 C CNN
- 1 3000 2850
- 1 0 0 -1
-$EndComp
-$EndSCHEMATC
diff --git a/Examples/InvertingAmplifier/ua741.cir.ckt b/Examples/InvertingAmplifier/ua741.cir.ckt
deleted file mode 100644
index 3661a9a2..00000000
--- a/Examples/InvertingAmplifier/ua741.cir.ckt
+++ /dev/null
@@ -1,9 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-
-u1 6 7 3 port
-rout1 3 2 75
-eout1 2 0 1 0 1
-cbw1 1 0 31.85e-9
-rbw1 1 4 0.5e6
-ein1 4 0 7 6 100e3
-rin1 7 6 2e6
diff --git a/Examples/InvertingAmplifier/ua741_Previous_Values.xml b/Examples/InvertingAmplifier/ua741_Previous_Values.xml
deleted file mode 100644
index 9c7bb530..00000000
--- a/Examples/InvertingAmplifier/ua741_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file