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authorSunil Shetye2019-03-11 15:57:40 +0530
committerSunil Shetye2019-07-01 17:43:18 +0530
commitef380a4a6a2ff4c90bde90c41296e94f5db70389 (patch)
tree13acc3811724d347e87f8667f6c8a4f7ebb2c212 /Examples/HalfAdder/half_adder.cir
parent5e116a4676854289fabeb6cce57f3d01ae8f5709 (diff)
downloadeSim-ef380a4a6a2ff4c90bde90c41296e94f5db70389.tar.gz
eSim-ef380a4a6a2ff4c90bde90c41296e94f5db70389.tar.bz2
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Half adder subcircuit filename conflict in Windows
Replaced Half_Adder example with renamed HalfAdder to avoid Windows case-only filename difference conflict with subcircuit half_adder. Based on contribution by https://github.com/MaxOLydian/eSim
Diffstat (limited to 'Examples/HalfAdder/half_adder.cir')
-rw-r--r--Examples/HalfAdder/half_adder.cir11
1 files changed, 11 insertions, 0 deletions
diff --git a/Examples/HalfAdder/half_adder.cir b/Examples/HalfAdder/half_adder.cir
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+* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Jun 24 11:31:48 2015
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+*Sheet Name:/
+U2 1 4 3 d_xor
+U3 1 4 2 d_and
+U1 1 4 3 2 PORT
+
+.end