changed Examples

18 files changed, 1142 insertions, 0 deletions

diff --git a/Examples/CMOS_Inverter/.CMOS_Inverter.cir.out.swp b/Examples/CMOS_Inverter/.CMOS_Inverter.cir.out.swp
new file mode 100644
index 00000000..f2abf69d
--- /dev/null
+++ b/Examples/CMOS_Inverter/.CMOS_Inverter.cir.out.swp
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter-cache.bak b/Examples/CMOS_Inverter/CMOS_Inverter-cache.bak
new file mode 100644
index 00000000..40de879d
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter-cache.bak
@@ -0,0 +1,118 @@
+EESchema-LIBRARY Version 2.3  Date: Tuesday 28 April 2015 10:53:44 PM IST
+#encoding utf-8
+#
+# C
+#
+DEF C C 0 10 N Y 1 F N
+F0 "C" 50 100 50 H V L CNN
+F1 "C" 50 -100 50 H V L CNN
+$FPLIST
+ SM*
+ C?
+ C1-1
+$ENDFPLIST
+DRAW
+P 2 0 1 10  -100 -30  100 -30 N
+P 2 0 1 10  -100 30  100 30 N
+X ~ 1 0 200 170 D 40 40 1 1 P
+X ~ 2 0 -200 170 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# dc
+#
+DEF dc v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "dc" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 P
+X - 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF ~GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 0 30 H I C CNN
+F1 "GND" 0 -70 30 H I C CNN
+DRAW
+P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
+X GND 1 0 0 0 U 30 30 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# MOS_N
+#
+DEF MOS_N Q 0 0 N Y 1 F N
+F0 "Q" 10 170 60 H V R CNN
+F1 "MOS_N" 10 -150 60 H V R CNN
+ALIAS MOSFET_N
+DRAW
+P 2 0 1 8  -50 -100  -50 100 N
+P 2 0 1 10  0 -150  0 150 N
+P 2 0 1 0  100 -100  0 -100 N
+P 2 0 1 0  100 100  0 100 N
+P 3 0 1 8  100 -100  100 0  50 0 N
+P 5 0 1 8  50 30  50 -30  0 0  50 30  50 30 N
+X D D 100 200 100 D 40 40 1 1 P
+X G G -200 0 150 R 40 40 1 1 I
+X S S 100 -200 100 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# MOS_P
+#
+DEF MOS_P Q 0 40 Y N 1 F N
+F0 "Q" 0 190 60 H V R CNN
+F1 "MOS_P" 0 -180 60 H V R CNN
+ALIAS MOSFET_P
+DRAW
+P 2 0 1 8  -50 -100  -50 100 N
+P 2 0 1 10  0 -150  0 150 N
+P 2 0 1 8  30 0  0 0 N
+P 2 0 1 0  100 -100  0 -100 N
+P 2 0 1 0  100 100  0 100 N
+P 3 0 1 0  80 0  100 0  100 -100 N
+P 5 0 1 8  30 40  30 -30  80 0  30 40  30 40 N
+X D D 100 200 100 D 40 40 1 1 P
+X G G -200 0 150 R 40 40 1 1 I
+X S S 100 -200 100 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# PWR_FLAG
+#
+DEF PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 270 30 H I C CNN
+F1 "PWR_FLAG" 0 230 30 H V C CNN
+DRAW
+X pwr 1 0 0 0 U 20 20 0 0 w
+P 3 0 1 0  0 0  0 100  0 100 N
+P 5 0 1 0  0 100  -100 150  0 200  100 150  0 100 N
+ENDDRAW
+ENDDEF
+#
+# vplot8_1
+#
+DEF vplot8_1 U 0 40 Y Y 8 F N
+F0 "U" -150 100 50 H V C CNN
+F1 "vplot8_1" 150 100 50 H V C CNN
+DRAW
+C 0 0 100 0 0 0 N
+X + 1 0 -300 200 U 40 40 1 1 I
+X + 2 0 -300 200 U 40 40 2 1 I
+X + 3 0 -300 200 U 40 40 3 1 I
+X + 4 0 -300 200 U 40 40 4 1 I
+X + 5 0 -300 200 U 40 40 5 1 I
+X + 6 0 -300 200 U 40 40 6 1 I
+X + 7 0 -300 200 U 40 40 7 1 I
+X + 8 0 -300 200 U 40 40 8 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib b/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib
new file mode 100644
index 00000000..4e4d79cc
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib
@@ -0,0 +1,158 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# C
+#
+DEF C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C?
+ C_????_*
+ C_????
+ SMD*_c
+ Capacitor*
+$ENDFPLIST
+DRAW
+P 2 0 1 20  -80 -30  80 -30 N
+P 2 0 1 20  -80 30  80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# MOS_N
+#
+DEF MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10  130 -290  130 -250 N
+P 2 0 1 0  130 -270  200 -270 N
+P 2 0 1 10  130 -220  130 -180 N
+P 2 0 1 0  130 -200  200 -200 N
+P 2 0 1 10  130 -150  130 -110 N
+P 2 0 1 0  130 -130  200 -130 N
+P 2 0 1 0  200 -300  200 -270 N
+P 2 0 1 0  200 -130  200 -100 N
+P 3 0 1 10  110 -275  110 -125  110 -125 N
+P 3 0 1 0  200 -200  300 -200  300 -250 N
+P 4 0 1 0  140 -200  180 -215  180 -185  140 -200 F
+X D 1 200 0 100 D 50 50 1 1 E
+X G 2 -100 -200 210 R 50 50 1 1 I
+X S 3 200 -400 100 U 50 50 1 1 C
+X B 4 300 -350 98 U 47 47 1 1 I
+ENDDRAW
+ENDDEF
+#
+# MOS_P
+#
+DEF MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0  80 -70  150 -70 N
+P 2 0 1 10  80 -50  80 -90 N
+P 2 0 1 0  80 0  150 0 N
+P 2 0 1 10  80 20  80 -20 N
+P 2 0 1 0  80 70  150 70 N
+P 2 0 1 10  80 90  80 50 N
+P 2 0 1 0  150 -70  150 -100 N
+P 2 0 1 0  150 100  150 70 N
+P 3 0 1 10  60 75  60 -75  60 -75 N
+P 3 0 1 0  150 0  250 0  250 -50 N
+P 4 0 1 0  140 0  100 -15  100 15  140 0 F
+X D 1 150 200 100 D 50 50 1 1 C
+X G 2 -150 0 210 R 50 50 1 1 I
+X S 3 150 -200 100 U 50 50 1 1 E
+X B 4 250 -150 100 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# PWR_FLAG
+#
+DEF PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 95 50 H I C CNN
+F1 "PWR_FLAG" 0 180 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+X pwr 1 0 0 0 U 50 50 0 0 w
+P 6 0 1 0  0 0  0 50  -75 100  0 150  75 100  0 50 N
+ENDDRAW
+ENDDEF
+#
+# dc-RESCUE-CMOS_Inverter
+#
+DEF dc-RESCUE-CMOS_Inverter v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "dc-RESCUE-CMOS_Inverter" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 P
+X - 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# pwl
+#
+DEF pwl v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "pwl" -250 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50
+A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50
+A -75 -700 750 919 880 0 1 0 N -100 50 -50 50
+A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50
+A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 0 1 1 I
+X - 2 0 -450 300 U 50 0 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib b/Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib
new file mode 100644
index 00000000..e38bcb86
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib
@@ -0,0 +1,21 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# dc-RESCUE-CMOS_Inverter
+#
+DEF dc-RESCUE-CMOS_Inverter v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "dc-RESCUE-CMOS_Inverter" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 P
+X - 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.bak b/Examples/CMOS_Inverter/CMOS_Inverter.bak
new file mode 100644
index 00000000..5d83811f
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.bak
@@ -0,0 +1,257 @@
+EESchema Schematic File Version 2
+LIBS:CMOS_Inverter-rescue
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:CMOS_Inverter-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date "29 apr 2015"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Connection ~ 5800 2400
+Wire Wire Line
+	5900 2400 5800 2400
+Connection ~ 4200 3350
+Wire Wire Line
+	4200 3000 4200 3350
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 2900 3350
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	5050 2700 5500 2700
+Wire Wire Line
+	5050 2700 5050 3850
+Wire Wire Line
+	5050 3850 5500 3850
+Wire Wire Line
+	4000 3350 5050 3350
+Connection ~ 5050 3350
+Connection ~ 5800 3300
+Wire Wire Line
+	6550 4400 5800 4400
+Connection ~ 5800 4400
+Connection ~ 6300 3300
+Text GLabel 5900 2400 2    60   Input ~ 0
+vcc
+Text GLabel 6500 3150 2    60   Input ~ 0
+out
+Text GLabel 4350 3150 2    60   Input ~ 0
+in
+$Comp
+L C C1
+U 1 1 551BDFAE
+P 6550 3700
+F 0 "C1" H 6600 3800 50  0000 L CNN
+F 1 "1u" H 6600 3600 50  0000 L CNN
+F 2 "" H 6550 3700 60  0001 C CNN
+F 3 "" H 6550 3700 60  0001 C CNN
+	1    6550 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PWR_FLAG #FLG01
+U 1 1 54F86E05
+P 2900 3100
+F 0 "#FLG01" H 2900 3370 30  0001 C CNN
+F 1 "PWR_FLAG" H 2900 3330 30  0000 C CNN
+F 2 "" H 2900 3100 60  0001 C CNN
+F 3 "" H 2900 3100 60  0001 C CNN
+	1    2900 3100
+	1    0    0    -1  
+$EndComp
+$Comp
+L dc-RESCUE-CMOS_Inverter v1
+U 1 1 556C4B7E
+P 3550 3350
+F 0 "v1" H 3350 3450 60  0000 C CNN
+F 1 "DC" H 3350 3300 60  0000 C CNN
+F 2 "R1" H 3250 3350 60  0000 C CNN
+F 3 "" H 3550 3350 60  0000 C CNN
+	1    3550 3350
+	0    1    1    0   
+$EndComp
+$Comp
+L dc-RESCUE-CMOS_Inverter v2
+U 1 1 556C4BA7
+P 5800 1850
+F 0 "v2" H 5600 1950 60  0000 C CNN
+F 1 "5" H 5600 1800 60  0000 C CNN
+F 2 "R1" H 5500 1850 60  0000 C CNN
+F 3 "" H 5800 1850 60  0000 C CNN
+	1    5800 1850
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	6300 3050 6300 3300
+Wire Wire Line
+	5800 3300 6550 3300
+$Comp
+L MOS_N M1
+U 1 1 556F0E6F
+P 5600 3650
+F 0 "M1" H 5600 3500 50  0000 R CNN
+F 1 "MOS_N" H 5700 3600 50  0000 R CNN
+F 2 "" H 5900 3350 29  0000 C CNN
+F 3 "" H 5700 3450 60  0000 C CNN
+	1    5600 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L MOS_P M2
+U 1 1 556F0EE6
+P 5650 2700
+F 0 "M2" H 5600 2750 50  0000 R CNN
+F 1 "MOS_P" H 5700 2850 50  0000 R CNN
+F 2 "" H 5900 2800 29  0000 C CNN
+F 3 "" H 5700 2700 60  0000 C CNN
+	1    5650 2700
+	1    0    0    1   
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5800 4150
+Connection ~ 5800 2450
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	5900 2450 5800 2450
+$Comp
+L PWR_FLAG #FLG02
+U 1 1 557AB7F7
+P 5600 4500
+F 0 "#FLG02" H 5600 4595 50  0001 C CNN
+F 1 "PWR_FLAG" H 5600 4680 50  0000 C CNN
+F 2 "" H 5600 4500 60  0000 C CNN
+F 3 "" H 5600 4500 60  0000 C CNN
+	1    5600 4500
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5800 4550
+$Comp
+L plot_v1 U1
+U 1 1 56D852DA
+P 4200 3200
+F 0 "U1" H 4200 3700 60  0000 C CNN
+F 1 "plot_v1" H 4400 3550 60  0000 C CNN
+F 2 "" H 4200 3200 60  0000 C CNN
+F 3 "" H 4200 3200 60  0000 C CNN
+	1    4200 3200
+	1    0    0    -1  
+$EndComp
+$Comp
+L plot_v1 U2
+U 1 1 56D853D9
+P 6300 3250
+F 0 "U2" H 6300 3750 60  0000 C CNN
+F 1 "plot_v1" H 6500 3600 60  0000 C CNN
+F 2 "" H 6300 3250 60  0000 C CNN
+F 3 "" H 6300 3250 60  0000 C CNN
+	1    6300 3250
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6500 3150 6300 3150
+Connection ~ 6300 3150
+Wire Wire Line
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+Connection ~ 4200 3150
+Wire Wire Line
+	5800 1300 5800 1400
+$Comp
+L GND #PWR03
+U 1 1 56D85765
+P 5800 1300
+F 0 "#PWR03" H 5800 1050 50  0001 C CNN
+F 1 "GND" H 5800 1150 50  0000 C CNN
+F 2 "" H 5800 1300 50  0000 C CNN
+F 3 "" H 5800 1300 50  0000 C CNN
+	1    5800 1300
+	-1   0    0    1   
+$EndComp
+$Comp
+L GND #PWR04
+U 1 1 56D857A1
+P 5800 4700
+F 0 "#PWR04" H 5800 4450 50  0001 C CNN
+F 1 "GND" H 5800 4550 50  0000 C CNN
+F 2 "" H 5800 4700 50  0000 C CNN
+F 3 "" H 5800 4700 50  0000 C CNN
+	1    5800 4700
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR05
+U 1 1 56D8585B
+P 2900 3550
+F 0 "#PWR05" H 2900 3300 50  0001 C CNN
+F 1 "GND" H 2900 3400 50  0000 C CNN
+F 2 "" H 2900 3550 50  0000 C CNN
+F 3 "" H 2900 3550 50  0000 C CNN
+	1    2900 3550
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6550 3850 6550 4400
+$EndSCHEMATC
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir b/Examples/CMOS_Inverter/CMOS_Inverter.cir
new file mode 100644
index 00000000..8623d798
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.cir
@@ -0,0 +1,17 @@
+* /home/fossee/UpdatedExamples/CMOS_Inverter/CMOS_Inverter.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar  3 20:45:21 2016
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+v2  vcc GND 5		
+M1  out in GND GND MOS_N		
+M2  out in vcc vcc MOS_P		
+U1  in plot_v1		
+U2  out plot_v1		
+C1  out GND 1u		
+v1  in GND pwl		
+
+.end
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir.out b/Examples/CMOS_Inverter/CMOS_Inverter.cir.out
new file mode 100644
index 00000000..eb31bdad
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.cir.out
@@ -0,0 +1,22 @@
+* /home/fossee/updatedexamples/cmos_inverter/cmos_inverter.cir
+
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+v2  vcc gnd 5
+m1 out in gnd gnd CMOSN W=100u L=100u M=1
+m2 out in vcc vcc CMOSP W=100u L=100u M=1
+* u1  in plot_v1
+* u2  out plot_v1
+c1  out gnd 1u
+v1  in gnd pwl(0m 0 0.5m 5 50m 5 50.5m 0 100m 0)
+.tran 10e-03 100e-03 0e-03
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(in)
+plot v(out)
+.endc
+.end
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.pro b/Examples/CMOS_Inverter/CMOS_Inverter.pro
new file mode 100644
index 00000000..51c131a8
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.pro
@@ -0,0 +1,47 @@
+update=Thu Mar  3 20:31:57 2016
+last_client=eeschema
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=CMOS_Inverter-rescue
+LibName2=eSim_Analog
+LibName3=eSim_Devices
+LibName4=eSim_Digital
+LibName5=eSim_Hybrid
+LibName6=eSim_Miscellaneous
+LibName7=eSim_Plot
+LibName8=eSim_Power
+LibName9=eSim_Sources
+LibName10=eSim_Subckt
+LibName11=eSim_User
+LibName12=power
+LibName13=device
+LibName14=transistors
+LibName15=conn
+LibName16=linear
+LibName17=regul
+LibName18=74xx
+LibName19=cmos4000
+LibName20=adc-dac
+LibName21=memory
+LibName22=xilinx
+LibName23=special
+LibName24=microcontrollers
+LibName25=dsp
+LibName26=microchip
+LibName27=analog_switches
+LibName28=motorola
+LibName29=texas
+LibName30=intel
+LibName31=audio
+LibName32=interface
+LibName33=digital-audio
+LibName34=philips
+LibName35=display
+LibName36=cypress
+LibName37=siliconi
+LibName38=opto
+LibName39=atmel
+LibName40=contrib
+LibName41=valves
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.proj b/Examples/CMOS_Inverter/CMOS_Inverter.proj
new file mode 100644
index 00000000..f03822e4
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.proj
@@ -0,0 +1 @@
+schematicFile CMOS_Inverter.sch
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.sch b/Examples/CMOS_Inverter/CMOS_Inverter.sch
new file mode 100644
index 00000000..50e74eba
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.sch
@@ -0,0 +1,257 @@
+EESchema Schematic File Version 2
+LIBS:CMOS_Inverter-rescue
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:CMOS_Inverter-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date "29 apr 2015"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text GLabel 5900 2400 2    60   Input ~ 0
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+Text GLabel 6500 3150 2    60   Input ~ 0
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+Text GLabel 4350 3150 2    60   Input ~ 0
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+$EndComp
+$Comp
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+	1    5600 3650
+	1    0    0    -1  
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+F 2 "" H 5900 2800 29  0000 C CNN
+F 3 "" H 5700 2700 60  0000 C CNN
+	1    5650 2700
+	1    0    0    1   
+$EndComp
+$Comp
+L PWR_FLAG #FLG02
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+F 0 "#FLG02" H 5600 4595 50  0001 C CNN
+F 1 "PWR_FLAG" H 5600 4680 50  0000 C CNN
+F 2 "" H 5600 4500 60  0000 C CNN
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+	1    5600 4500
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+$EndComp
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+F 2 "" H 4200 3200 60  0000 C CNN
+F 3 "" H 4200 3200 60  0000 C CNN
+	1    4200 3200
+	1    0    0    -1  
+$EndComp
+$Comp
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+F 2 "" H 6300 3250 60  0000 C CNN
+F 3 "" H 6300 3250 60  0000 C CNN
+	1    6300 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR03
+U 1 1 56D85765
+P 5800 1300
+F 0 "#PWR03" H 5800 1050 50  0001 C CNN
+F 1 "GND" H 5800 1150 50  0000 C CNN
+F 2 "" H 5800 1300 50  0000 C CNN
+F 3 "" H 5800 1300 50  0000 C CNN
+	1    5800 1300
+	-1   0    0    1   
+$EndComp
+$Comp
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+P 5800 4700
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+	1    5800 4700
+	1    0    0    -1  
+$EndComp
+$Comp
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+F 3 "" H 2900 3550 50  0000 C CNN
+	1    2900 3550
+	1    0    0    -1  
+$EndComp
+$Comp
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+	1    6550 3700
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6550 3850 6550 4400
+Wire Wire Line
+	5800 1300 5800 1400
+Connection ~ 4200 3150
+Wire Wire Line
+	4350 3150 4200 3150
+Connection ~ 6300 3150
+Wire Wire Line
+	6500 3150 6300 3150
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+Wire Wire Line
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+F 2 "R1" H 3250 3350 60  0000 C CNN
+F 3 "" H 3550 3350 60  0000 C CNN
+	1    3550 3350
+	0    1    1    0   
+$EndComp
+$EndSCHEMATC
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml b/Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml
new file mode 100644
index 00000000..5a4bb820
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis><source><v2 name="Source type">5</v2><v1 name="Source type">pwl<field1 name="Enter in pwl format">0m 0 0.5m 5 50m 5 50.5m 0 100m 0</field1></v1></source><model /><devicemodel><m1><field>/home/fossee/esim-updated/eSim/src/deviceModelLibrary/MOS/NMOS-180nm.lib</field><field /><field /><field /></m1><m2><field>/home/fossee/esim-updated/eSim/src/deviceModelLibrary/MOS/PMOS-180nm.lib</field><field /><field /><field /></m2></devicemodel><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter_last_input.txt b/Examples/CMOS_Inverter/CMOS_Inverter_last_input.txt
new file mode 100644
index 00000000..5f3d6c29
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter_last_input.txt
@@ -0,0 +1,2 @@
+v1 in gnd  dc 5
+v2 vcc gnd  dc 5
diff --git a/Examples/CMOS_Inverter/NMOS-180nm.lib b/Examples/CMOS_Inverter/NMOS-180nm.lib
new file mode 100644
index 00000000..51e9b119
--- /dev/null
+++ b/Examples/CMOS_Inverter/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 
++            K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 
++            DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++            UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++            A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++            XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++            CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3    
++            PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++            PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++            WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++            CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 
++            MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 
++            PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/Examples/CMOS_Inverter/PMOS-180nm.lib b/Examples/CMOS_Inverter/PMOS-180nm.lib
new file mode 100644
index 00000000..032b5b95
--- /dev/null
+++ b/Examples/CMOS_Inverter/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++            K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++            DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++            AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++            PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 
++            VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++            DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++            PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++            UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++            CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8            +            MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3    
++            WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/Examples/CMOS_Inverter/analysis b/Examples/CMOS_Inverter/analysis
new file mode 100644
index 00000000..660a46cc
--- /dev/null
+++ b/Examples/CMOS_Inverter/analysis
@@ -0,0 +1 @@
+.tran 10e-03 100e-03 0e-03
\ No newline at end of file
diff --git a/Examples/CMOS_Inverter/b3v32check.log b/Examples/CMOS_Inverter/b3v32check.log
new file mode 100644
index 00000000..b08de179
--- /dev/null
+++ b/Examples/CMOS_Inverter/b3v32check.log
@@ -0,0 +1,6 @@
+BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)
+Parameter Checking.
+Model = cmosn
+W = 0.0001, L = 0.0001, M = 1
+Warning: Pd = 0 is less than W.
+Warning: Ps = 0 is less than W.
diff --git a/Examples/CMOS_Inverter/plot_data_i.txt b/Examples/CMOS_Inverter/plot_data_i.txt
new file mode 100644
index 00000000..eb2ecd84
--- /dev/null
+++ b/Examples/CMOS_Inverter/plot_data_i.txt
@@ -0,0 +1,105 @@
+         * /home/fossee/updatedexamples/cmos_inverter/cmos_inverter.cir
+         Transient Analysis  Mon Aug 26 16:48:39  2019
+--------------------------------------------------------------------------------
+Index   time            v1#branch       v2#branch       
+--------------------------------------------------------------------------------
+0	0.000000e+00	0.000000e+00	-1.44364e-11	
+1	5.000000e-06	-1.08398e-06	4.220864e-07	
+2	1.000000e-05	-1.07855e-06	4.224245e-07	
+3	2.000000e-05	-1.06529e-06	4.230573e-07	
+4	3.122027e-05	-1.09702e-06	4.237329e-07	
+5	4.261616e-05	-1.40088e-06	4.242644e-07	
+6	5.453771e-05	-1.55219e-06	4.227076e-07	
+7	7.296709e-05	-1.47175e-06	4.041312e-07	
+8	9.144949e-05	-1.55369e-06	3.516220e-07	
+9	1.284143e-04	-1.47267e-06	8.098758e-08	
+10	2.023439e-04	-1.56072e-06	-1.30887e-06	
+11	3.502031e-04	-1.49613e-06	-4.87527e-06	
+12	5.000000e-04	-1.14389e-06	2.970244e-07	
+13	5.010313e-04	-4.25119e-10	-3.23614e-12	
+14	5.030940e-04	-1.18963e-10	-3.37536e-12	
+15	5.072194e-04	-4.25205e-10	-3.24360e-12	
+16	5.154701e-04	-1.19414e-10	-3.39089e-12	
+17	5.319715e-04	-4.25984e-10	-3.27483e-12	
+18	5.649744e-04	-1.21104e-10	-3.45147e-12	
+19	6.309801e-04	-4.29615e-10	-3.39337e-12	
+20	7.629914e-04	-1.29787e-10	-3.68303e-12	
+21	1.027014e-03	-4.55655e-10	-3.84134e-12	
+22	1.555060e-03	-2.74051e-10	-4.52651e-12	
+23	2.611151e-03	-4.60756e-09	-5.32636e-12	
+24	4.611151e-03	-2.18631e-08	-6.71107e-12	
+25	6.611151e-03	-2.46290e-09	-7.28349e-12	
+26	8.611151e-03	-1.19971e-08	-7.79571e-12	
+27	1.061115e-02	4.330151e-09	-7.84913e-12	
+28	1.261115e-02	-8.21108e-09	-8.08054e-12	
+29	1.461115e-02	6.287619e-09	-7.99010e-12	
+30	1.656886e-02	-7.23655e-09	-8.14967e-12	
+31	1.850200e-02	6.763943e-09	-8.02346e-12	
+32	2.042896e-02	-7.00042e-09	-8.16602e-12	
+33	2.236466e-02	6.884703e-09	-8.03164e-12	
+34	2.430032e-02	-6.93989e-09	-8.17011e-12	
+35	2.623482e-02	6.912354e-09	-8.03390e-12	
+36	2.816446e-02	-6.92609e-09	-8.17090e-12	
+37	3.009657e-02	6.919218e-09	-8.03452e-12	
+38	3.202839e-02	-6.92264e-09	-8.17116e-12	
+39	3.396181e-02	6.920921e-09	-8.03442e-12	
+40	3.589384e-02	-6.92177e-09	-8.17133e-12	
+41	3.782674e-02	6.921336e-09	-8.03423e-12	
+42	3.975935e-02	-6.92154e-09	-8.17124e-12	
+43	4.175935e-02	6.921431e-09	-8.03435e-12	
+44	4.375935e-02	-6.92148e-09	-8.17124e-12	
+45	4.575935e-02	6.921445e-09	-8.03435e-12	
+46	4.775935e-02	-6.92145e-09	-8.17124e-12	
+47	4.975935e-02	6.921438e-09	-8.03435e-12	
+48	5.000000e-02	-6.92139e-09	-8.17124e-12	
+49	5.000344e-02	1.073445e-06	-2.29261e-07	
+50	5.001031e-02	1.062517e-06	-2.18132e-07	
+51	5.002405e-02	1.057252e-06	-2.12216e-07	
+52	5.003890e-02	1.179433e-06	-3.00119e-07	
+53	5.005236e-02	1.647596e-06	-9.67225e-07	
+54	5.006621e-02	1.362141e-06	-2.32705e-06	
+
+Index   time            v1#branch       v2#branch       
+--------------------------------------------------------------------------------
+55	5.007947e-02	1.653940e-06	-4.70595e-06	
+56	5.009790e-02	1.361331e-06	-8.93152e-06	
+57	5.012743e-02	1.653052e-06	-1.88474e-05	
+58	5.017360e-02	1.361145e-06	-4.08411e-05	
+59	5.024499e-02	1.654734e-06	-9.18089e-05	
+60	5.035306e-02	1.367456e-06	-2.14666e-04	
+61	5.050000e-02	1.308831e-06	-4.81732e-04	
+62	5.050138e-02	2.449697e-10	-4.81265e-04	
+63	5.050415e-02	-7.33525e-11	-4.81204e-04	
+64	5.050886e-02	2.448991e-10	-4.81102e-04	
+65	5.051827e-02	-7.32262e-11	-4.80897e-04	
+66	5.053710e-02	2.450062e-10	-4.80485e-04	
+67	5.057476e-02	-7.29317e-11	-4.79658e-04	
+68	5.065008e-02	2.455833e-10	-4.77988e-04	
+69	5.080073e-02	-7.16665e-11	-4.74582e-04	
+70	5.110201e-02	2.485198e-10	-4.67524e-04	
+71	5.170459e-02	-6.33768e-11	-4.52499e-04	
+72	5.290973e-02	2.876237e-10	-4.19529e-04	
+73	5.490973e-02	5.463069e-10	-3.59768e-04	
+74	5.690973e-02	5.709571e-09	-2.99143e-04	
+75	5.890973e-02	6.043230e-09	-2.42387e-04	
+76	6.090973e-02	6.573391e-09	-1.92306e-04	
+77	6.290973e-02	4.836922e-09	-1.50032e-04	
+78	6.490973e-02	4.729522e-09	-1.15521e-04	
+79	6.690973e-02	2.963431e-09	-8.80490e-05	
+80	6.890973e-02	3.065391e-09	-6.65913e-05	
+81	7.090973e-02	1.579419e-09	-5.00669e-05	
+82	7.290973e-02	1.955450e-09	-3.74849e-05	
+83	7.490973e-02	7.124459e-10	-2.79620e-05	
+84	7.690973e-02	1.290972e-09	-2.08077e-05	
+85	7.890973e-02	2.069733e-10	-1.54552e-05	
+86	8.090973e-02	9.095159e-10	-1.14644e-05	
+87	8.290973e-02	-7.92520e-11	-8.49513e-06	
+88	8.490973e-02	6.956285e-10	-6.29066e-06	
+89	8.690973e-02	-2.38603e-10	-4.65524e-06	
+90	8.890973e-02	5.771652e-10	-3.44402e-06	
+91	9.090973e-02	-3.26527e-10	-2.54674e-06	
+92	9.290973e-02	5.119823e-10	-1.88325e-06	
+93	9.490973e-02	-3.74807e-10	-1.39194e-06	
+94	9.690973e-02	4.762428e-10	-1.02913e-06	
+95	9.890973e-02	-4.01248e-10	-7.60373e-07	
+96	1.000000e-01	4.601805e-10	-6.45655e-07	
diff --git a/Examples/CMOS_Inverter/plot_data_v.txt b/Examples/CMOS_Inverter/plot_data_v.txt
new file mode 100644
index 00000000..eb899c37
--- /dev/null
+++ b/Examples/CMOS_Inverter/plot_data_v.txt
@@ -0,0 +1,105 @@
+         * /home/fossee/updatedexamples/cmos_inverter/cmos_inverter.cir
+         Transient Analysis  Mon Aug 26 16:48:39  2019
+--------------------------------------------------------------------------------
+Index   time            in              out             vcc             
+--------------------------------------------------------------------------------
+0	0.000000e+00	0.000000e+00	5.000000e+00	5.000000e+00	
+1	5.000000e-06	5.000000e-02	5.000002e+00	5.000000e+00	
+2	1.000000e-05	1.000000e-01	5.000004e+00	5.000000e+00	
+3	2.000000e-05	2.000000e-01	5.000008e+00	5.000000e+00	
+4	3.122027e-05	3.122027e-01	5.000013e+00	5.000000e+00	
+5	4.261616e-05	4.261616e-01	5.000017e+00	5.000000e+00	
+6	5.453771e-05	5.453771e-01	5.000005e+00	5.000000e+00	
+7	7.296709e-05	7.296709e-01	4.999871e+00	5.000000e+00	
+8	9.144949e-05	9.144949e-01	4.999479e+00	5.000000e+00	
+9	1.284143e-04	1.284143e+00	4.997339e+00	5.000000e+00	
+10	2.023439e-04	2.023439e+00	4.984459e+00	5.000000e+00	
+11	3.502031e-04	3.502031e+00	4.910883e+00	5.000000e+00	
+12	5.000000e-04	5.000000e+00	4.767735e+00	5.000000e+00	
+13	5.010313e-04	5.000000e+00	4.766519e+00	5.000000e+00	
+14	5.030940e-04	5.000000e+00	4.764088e+00	5.000000e+00	
+15	5.072194e-04	5.000000e+00	4.759227e+00	5.000000e+00	
+16	5.154701e-04	5.000000e+00	4.749516e+00	5.000000e+00	
+17	5.319715e-04	5.000000e+00	4.730128e+00	5.000000e+00	
+18	5.649744e-04	5.000000e+00	4.691496e+00	5.000000e+00	
+19	6.309801e-04	5.000000e+00	4.614812e+00	5.000000e+00	
+20	7.629914e-04	5.000000e+00	4.463791e+00	5.000000e+00	
+21	1.027014e-03	5.000000e+00	4.171338e+00	5.000000e+00	
+22	1.555060e-03	5.000000e+00	3.625886e+00	5.000000e+00	
+23	2.611151e-03	5.000000e+00	2.693993e+00	5.000000e+00	
+24	4.611151e-03	5.000000e+00	1.452843e+00	5.000000e+00	
+25	6.611151e-03	5.000000e+00	7.469712e-01	5.000000e+00	
+26	8.611151e-03	5.000000e+00	3.737508e-01	5.000000e+00	
+27	1.061115e-02	5.000000e+00	1.843359e-01	5.000000e+00	
+28	1.261115e-02	5.000000e+00	9.025318e-02	5.000000e+00	
+29	1.461115e-02	5.000000e+00	4.402884e-02	5.000000e+00	
+30	1.656886e-02	5.000000e+00	2.179764e-02	5.000000e+00	
+31	1.850200e-02	5.000000e+00	1.088616e-02	5.000000e+00	
+32	2.042896e-02	5.000000e+00	5.447191e-03	5.000000e+00	
+33	2.236466e-02	5.000000e+00	2.715556e-03	5.000000e+00	
+34	2.430032e-02	5.000000e+00	1.353813e-03	5.000000e+00	
+35	2.623482e-02	5.000000e+00	6.752433e-04	5.000000e+00	
+36	2.816446e-02	5.000000e+00	3.374345e-04	5.000000e+00	
+37	3.009657e-02	5.000000e+00	1.684679e-04	5.000000e+00	
+38	3.202839e-02	5.000000e+00	8.412501e-05	5.000000e+00	
+39	3.396181e-02	5.000000e+00	4.198760e-05	5.000000e+00	
+40	3.589384e-02	5.000000e+00	2.097374e-05	5.000000e+00	
+41	3.782674e-02	5.000000e+00	1.047916e-05	5.000000e+00	
+42	3.975935e-02	5.000000e+00	5.242170e-06	5.000000e+00	
+43	4.175935e-02	5.000000e+00	2.560529e-06	5.000000e+00	
+44	4.375935e-02	5.000000e+00	1.256841e-06	5.000000e+00	
+45	4.575935e-02	5.000000e+00	6.230583e-07	5.000000e+00	
+46	4.775935e-02	5.000000e+00	3.149387e-07	5.000000e+00	
+47	4.975935e-02	5.000000e+00	1.651510e-07	5.000000e+00	
+48	5.000000e-02	5.000000e+00	1.538261e-07	5.000000e+00	
+49	5.000344e-02	4.965649e+00	-1.29499e-06	5.000000e+00	
+50	5.001031e-02	4.896947e+00	-4.18960e-06	5.000000e+00	
+51	5.002405e-02	4.759543e+00	-9.96317e-06	5.000000e+00	
+52	5.003890e-02	4.610955e+00	-1.64325e-05	5.000000e+00	
+53	5.005236e-02	4.476410e+00	-2.11536e-05	5.000000e+00	
+54	5.006621e-02	4.337862e+00	-1.32460e-05	5.000000e+00	
+
+Index   time            in              out             vcc             
+--------------------------------------------------------------------------------
+55	5.007947e-02	4.205277e+00	1.896545e-05	5.000000e+00	
+56	5.009790e-02	4.021012e+00	1.240988e-04	5.000000e+00	
+57	5.012743e-02	3.725657e+00	4.986274e-04	5.000000e+00	
+58	5.017360e-02	3.264038e+00	1.804424e-03	5.000000e+00	
+59	5.024499e-02	2.550110e+00	6.343132e-03	5.000000e+00	
+60	5.035306e-02	1.469424e+00	2.230900e-02	5.000000e+00	
+61	5.050000e-02	0.000000e+00	7.287392e-02	5.000000e+00	
+62	5.050138e-02	0.000000e+00	7.353952e-02	5.000000e+00	
+63	5.050415e-02	0.000000e+00	7.487065e-02	5.000000e+00	
+64	5.050886e-02	0.000000e+00	7.713572e-02	5.000000e+00	
+65	5.051827e-02	0.000000e+00	8.166442e-02	5.000000e+00	
+66	5.053710e-02	0.000000e+00	9.071601e-02	5.000000e+00	
+67	5.057476e-02	0.000000e+00	1.087959e-01	5.000000e+00	
+68	5.065008e-02	0.000000e+00	1.448616e-01	5.000000e+00	
+69	5.080073e-02	0.000000e+00	2.166106e-01	5.000000e+00	
+70	5.110201e-02	0.000000e+00	3.585322e-01	5.000000e+00	
+71	5.170459e-02	0.000000e+00	6.357220e-01	5.000000e+00	
+72	5.290973e-02	0.000000e+00	1.161181e+00	5.000000e+00	
+73	5.490973e-02	0.000000e+00	1.940478e+00	5.000000e+00	
+74	5.690973e-02	0.000000e+00	2.599383e+00	5.000000e+00	
+75	5.890973e-02	0.000000e+00	3.140901e+00	5.000000e+00	
+76	6.090973e-02	0.000000e+00	3.575581e+00	5.000000e+00	
+77	6.290973e-02	0.000000e+00	3.917907e+00	5.000000e+00	
+78	6.490973e-02	0.000000e+00	4.183450e+00	5.000000e+00	
+79	6.690973e-02	0.000000e+00	4.387012e+00	5.000000e+00	
+80	6.890973e-02	0.000000e+00	4.541646e+00	5.000000e+00	
+81	7.090973e-02	0.000000e+00	4.658300e+00	5.000000e+00	
+82	7.290973e-02	0.000000e+00	4.745848e+00	5.000000e+00	
+83	7.490973e-02	0.000000e+00	4.811292e+00	5.000000e+00	
+84	7.690973e-02	0.000000e+00	4.860060e+00	5.000000e+00	
+85	7.890973e-02	0.000000e+00	4.896321e+00	5.000000e+00	
+86	8.090973e-02	0.000000e+00	4.923240e+00	5.000000e+00	
+87	8.290973e-02	0.000000e+00	4.943198e+00	5.000000e+00	
+88	8.490973e-02	0.000000e+00	4.957983e+00	5.000000e+00	
+89	8.690973e-02	0.000000e+00	4.968929e+00	5.000000e+00	
+90	8.890973e-02	0.000000e+00	4.977028e+00	5.000000e+00	
+91	9.090973e-02	0.000000e+00	4.983018e+00	5.000000e+00	
+92	9.290973e-02	0.000000e+00	4.987448e+00	5.000000e+00	
+93	9.490973e-02	0.000000e+00	4.990723e+00	5.000000e+00	
+94	9.690973e-02	0.000000e+00	4.993144e+00	5.000000e+00	
+95	9.890973e-02	0.000000e+00	4.994933e+00	5.000000e+00	
+96	1.000000e-01	0.000000e+00	4.995700e+00	5.000000e+00