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authorsaurabhb172020-03-18 18:27:02 +0530
committersaurabhb172020-03-18 18:27:02 +0530
commit3aa3c9f7f6b7e30c89dc8a83515044bb74854064 (patch)
tree707ef78111e714b4826b781288821fb53333daed /Examples/Analysis_Of_Digital_IC/4073_test/4073.cir.out
parent50cc0a9c65834db636c502cde6548f9e3971600c (diff)
downloadeSim-3aa3c9f7f6b7e30c89dc8a83515044bb74854064.tar.gz
eSim-3aa3c9f7f6b7e30c89dc8a83515044bb74854064.tar.bz2
eSim-3aa3c9f7f6b7e30c89dc8a83515044bb74854064.zip
fixes in Analysis of Digital ICs directory
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+* c:\users\malli\esim\src\subcircuitlibrary\4073\4073.cir
+
+.include 3_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad8_ net-_u1-pad9_ 3_and
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ ? net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ ? port
+x3 net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ 3_and
+x2 net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad10_ 3_and
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end