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author | saurabhb17 | 2020-03-11 14:59:48 +0530 |
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committer | saurabhb17 | 2020-03-11 14:59:48 +0530 |
commit | dc61eab5251234f02c0377ea328b929340b3604c (patch) | |
tree | f1bf080150f8e19788b2dc56eeb10021a44b2c2f /Examples/Analysis_Of_Digital_IC/4023_test/3_and.cir.out~fellowship2019-python3 | |
parent | 6ebbcc31ea0ce5c78c94718e2e46d87592c5d22b (diff) | |
download | eSim-dc61eab5251234f02c0377ea328b929340b3604c.tar.gz eSim-dc61eab5251234f02c0377ea328b929340b3604c.tar.bz2 eSim-dc61eab5251234f02c0377ea328b929340b3604c.zip |
cleanup part2
Diffstat (limited to 'Examples/Analysis_Of_Digital_IC/4023_test/3_and.cir.out~fellowship2019-python3')
-rw-r--r-- | Examples/Analysis_Of_Digital_IC/4023_test/3_and.cir.out~fellowship2019-python3 | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Examples/Analysis_Of_Digital_IC/4023_test/3_and.cir.out~fellowship2019-python3 b/Examples/Analysis_Of_Digital_IC/4023_test/3_and.cir.out~fellowship2019-python3 new file mode 100644 index 00000000..d7cf79a0 --- /dev/null +++ b/Examples/Analysis_Of_Digital_IC/4023_test/3_and.cir.out~fellowship2019-python3 @@ -0,0 +1,20 @@ +* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir + +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and +* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port +a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |