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authorSumanto Kar2024-11-21 23:44:08 +0530
committerSumanto Kar2024-11-21 23:44:08 +0530
commit2e05ee694c168125949315fd99233491cc98ed5c (patch)
treed4facb5e7871ed12c3650544fb8c5fc1bf7cb3e1
parent6e55ab5633673cf089898b1362cf044496eb2603 (diff)
downloadeSim-2e05ee694c168125949315fd99233491cc98ed5c.tar.gz
eSim-2e05ee694c168125949315fd99233491cc98ed5c.tar.bz2
eSim-2e05ee694c168125949315fd99233491cc98ed5c.zip
RC4559N is a dual operational amplifier
Diffstat
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/D.lib2
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/NJF.lib4
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC-cache.lib182
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir67
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir.out78
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.pro73
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sch1107
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sub72
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/RC4559N_sub/analysis1
12 files changed, 1595 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/RC4559N_sub/D.lib b/library/SubcircuitLibrary/RC4559N_sub/D.lib
new file mode 100644
index 00000000..f53bf3e0
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/RC4559N_sub/NJF.lib b/library/SubcircuitLibrary/RC4559N_sub/NJF.lib
new file mode 100644
index 00000000..dbb2cbae
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/NJF.lib
@@ -0,0 +1,4 @@
+.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
diff --git a/library/SubcircuitLibrary/RC4559N_sub/NPN.lib b/library/SubcircuitLibrary/RC4559N_sub/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/RC4559N_sub/PNP.lib b/library/SubcircuitLibrary/RC4559N_sub/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC-cache.lib b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC-cache.lib
new file mode 100644
index 00000000..3dddd3f6
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC-cache.lib
@@ -0,0 +1,182 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NJF
+#
+DEF eSim_NJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_NJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_n
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# zener
+#
+DEF zener U 0 40 Y Y 1 F N
+F0 "U" -50 -100 60 H V C CNN
+F1 "zener" 0 100 60 H V C CNN
+F2 "" 50 0 60 H V C CNN
+F3 "" 50 0 60 H V C CNN
+DRAW
+P 2 0 1 0 100 -50 50 -100 N
+P 2 0 1 0 100 50 100 -50 N
+P 2 0 1 0 100 50 150 100 N
+P 4 0 1 0 0 50 0 -50 100 0 0 50 N
+X ~ IN -200 0 200 R 50 43 1 1 I
+X ~ OUT 300 0 200 L 50 43 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir
new file mode 100644
index 00000000..4209920b
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir
@@ -0,0 +1,67 @@
+* D:\FOSSEE\eSim\library\SubcircuitLibrary\RC4559N_IC\RC4559N_IC.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 07/13/24 18:31:43
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+R3 Net-_J1-Pad3_ Net-_Q3-Pad3_ 8.7k
+Q3 Net-_Q1-Pad3_ Net-_Q13-Pad1_ Net-_Q3-Pad3_ eSim_PNP
+Q5 Net-_C2-Pad2_ Net-_Q5-Pad2_ Net-_Q1-Pad3_ eSim_PNP
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_PNP
+Q2 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_C1-Pad1_ eSim_NPN
+Q4 Net-_C2-Pad2_ Net-_Q1-Pad1_ Net-_Q4-Pad3_ eSim_NPN
+R2 Net-_C1-Pad1_ Net-_C1-Pad2_ 5k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 15p
+R4 Net-_Q4-Pad3_ Net-_C1-Pad2_ 5k
+Q9 Net-_Q10-Pad1_ Net-_Q13-Pad1_ Net-_J1-Pad3_ eSim_PNP
+Q13 Net-_Q13-Pad1_ Net-_Q13-Pad1_ Net-_J1-Pad3_ eSim_PNP
+Q11 Net-_J1-Pad3_ Net-_Q10-Pad1_ Net-_Q11-Pad3_ eSim_NPN
+Q7 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad2_ eSim_NPN
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ eSim_NPN
+R7 Net-_Q10-Pad2_ Net-_C2-Pad1_ 50k
+C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 15p
+D1 Net-_C2-Pad2_ Net-_C2-Pad1_ eSim_Diode
+Q6 Net-_J1-Pad3_ Net-_C2-Pad2_ Net-_Q6-Pad3_ eSim_NPN
+R6 Net-_Q6-Pad3_ Net-_C1-Pad2_ 50k
+R8 Net-_Q11-Pad3_ Net-_R10-Pad2_ 27
+R9 Net-_R10-Pad2_ Net-_Q12-Pad3_ 27
+Q12 Net-_C1-Pad2_ Net-_C2-Pad1_ Net-_Q12-Pad3_ eSim_PNP
+Q8 Net-_C2-Pad1_ Net-_Q6-Pad3_ Net-_C1-Pad2_ eSim_NPN
+Q14 Net-_Q13-Pad1_ Net-_J1-Pad1_ Net-_Q14-Pad3_ eSim_NPN
+R11 Net-_Q14-Pad3_ Net-_C1-Pad2_ 5.8k
+J1 Net-_J1-Pad1_ Net-_C1-Pad2_ Net-_J1-Pad3_ jfet_n
+U2 Net-_C1-Pad2_ Net-_J1-Pad1_ zener
+R10 Net-_R10-Pad1_ Net-_R10-Pad2_ 120
+R14 Net-_J1-Pad3_ Net-_Q17-Pad3_ 8.7k
+Q17 Net-_Q15-Pad3_ Net-_Q17-Pad2_ Net-_Q17-Pad3_ eSim_PNP
+Q19 Net-_C4-Pad2_ Net-_Q19-Pad2_ Net-_Q15-Pad3_ eSim_PNP
+Q15 Net-_Q15-Pad1_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_PNP
+Q16 Net-_Q15-Pad1_ Net-_Q15-Pad1_ Net-_C3-Pad1_ eSim_NPN
+Q18 Net-_C4-Pad2_ Net-_Q15-Pad1_ Net-_Q18-Pad3_ eSim_NPN
+R13 Net-_C3-Pad1_ Net-_C1-Pad2_ 5k
+C3 Net-_C3-Pad1_ Net-_C1-Pad2_ 15p
+R15 Net-_Q18-Pad3_ Net-_C1-Pad2_ 5k
+Q23 Net-_Q21-Pad1_ Net-_Q17-Pad2_ Net-_J1-Pad3_ eSim_PNP
+Q27 Net-_Q17-Pad2_ Net-_Q17-Pad2_ Net-_J1-Pad3_ eSim_PNP
+Q25 Net-_J1-Pad3_ Net-_Q21-Pad1_ Net-_Q25-Pad3_ eSim_NPN
+Q21 Net-_Q21-Pad1_ Net-_Q21-Pad1_ Net-_Q21-Pad3_ eSim_NPN
+Q24 Net-_Q21-Pad1_ Net-_Q21-Pad3_ Net-_C4-Pad1_ eSim_NPN
+R18 Net-_Q21-Pad3_ Net-_C4-Pad1_ 50k
+C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 15p
+D2 Net-_C4-Pad2_ Net-_C4-Pad1_ eSim_Diode
+Q20 Net-_J1-Pad3_ Net-_C4-Pad2_ Net-_Q20-Pad3_ eSim_NPN
+R16 Net-_Q20-Pad3_ Net-_C1-Pad2_ 50k
+R19 Net-_Q25-Pad3_ Net-_R19-Pad2_ 27
+R20 Net-_R19-Pad2_ Net-_Q26-Pad3_ 27
+Q26 Net-_C1-Pad2_ Net-_C4-Pad1_ Net-_Q26-Pad3_ eSim_PNP
+Q22 Net-_C4-Pad1_ Net-_Q20-Pad3_ Net-_C1-Pad2_ eSim_NPN
+Q28 Net-_Q17-Pad2_ Net-_J2-Pad1_ Net-_Q28-Pad3_ eSim_NPN
+R22 Net-_Q28-Pad3_ Net-_C1-Pad2_ 5.8k
+J2 Net-_J2-Pad1_ Net-_C1-Pad2_ Net-_J1-Pad3_ jfet_n
+U3 Net-_C1-Pad2_ Net-_J2-Pad1_ zener
+R21 Net-_R21-Pad1_ Net-_R19-Pad2_ 120
+U1 Net-_R10-Pad1_ Net-_Q1-Pad2_ Net-_Q5-Pad2_ Net-_C1-Pad2_ Net-_Q19-Pad2_ Net-_Q15-Pad2_ Net-_R21-Pad1_ Net-_J1-Pad3_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir.out b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir.out
new file mode 100644
index 00000000..417a2f72
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.cir.out
@@ -0,0 +1,78 @@
+* d:\fossee\esim\library\subcircuitlibrary\rc4559n_ic\rc4559n_ic.cir
+
+.include NPN.lib
+.include PNP.lib
+.include NJF.lib
+.include D.lib
+r3 net-_j1-pad3_ net-_q3-pad3_ 8.7k
+q3 net-_q1-pad3_ net-_q13-pad1_ net-_q3-pad3_ Q2N2907A
+q5 net-_c2-pad2_ net-_q5-pad2_ net-_q1-pad3_ Q2N2907A
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A
+q2 net-_q1-pad1_ net-_q1-pad1_ net-_c1-pad1_ Q2N2222
+q4 net-_c2-pad2_ net-_q1-pad1_ net-_q4-pad3_ Q2N2222
+r2 net-_c1-pad1_ net-_c1-pad2_ 5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 15p
+r4 net-_q4-pad3_ net-_c1-pad2_ 5k
+q9 net-_q10-pad1_ net-_q13-pad1_ net-_j1-pad3_ Q2N2907A
+q13 net-_q13-pad1_ net-_q13-pad1_ net-_j1-pad3_ Q2N2907A
+q11 net-_j1-pad3_ net-_q10-pad1_ net-_q11-pad3_ Q2N2222
+q7 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad2_ Q2N2222
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_c2-pad1_ Q2N2222
+r7 net-_q10-pad2_ net-_c2-pad1_ 50k
+c2 net-_c2-pad1_ net-_c2-pad2_ 15p
+d1 net-_c2-pad2_ net-_c2-pad1_ 1N4148
+q6 net-_j1-pad3_ net-_c2-pad2_ net-_q6-pad3_ Q2N2222
+r6 net-_q6-pad3_ net-_c1-pad2_ 50k
+r8 net-_q11-pad3_ net-_r10-pad2_ 27
+r9 net-_r10-pad2_ net-_q12-pad3_ 27
+q12 net-_c1-pad2_ net-_c2-pad1_ net-_q12-pad3_ Q2N2907A
+q8 net-_c2-pad1_ net-_q6-pad3_ net-_c1-pad2_ Q2N2222
+q14 net-_q13-pad1_ net-_j1-pad1_ net-_q14-pad3_ Q2N2222
+r11 net-_q14-pad3_ net-_c1-pad2_ 5.8k
+j1 net-_j1-pad1_ net-_c1-pad2_ net-_j1-pad3_ J2N3819
+* u2 net-_c1-pad2_ net-_j1-pad1_ zener
+r10 net-_r10-pad1_ net-_r10-pad2_ 120
+r14 net-_j1-pad3_ net-_q17-pad3_ 8.7k
+q17 net-_q15-pad3_ net-_q17-pad2_ net-_q17-pad3_ Q2N2907A
+q19 net-_c4-pad2_ net-_q19-pad2_ net-_q15-pad3_ Q2N2907A
+q15 net-_q15-pad1_ net-_q15-pad2_ net-_q15-pad3_ Q2N2907A
+q16 net-_q15-pad1_ net-_q15-pad1_ net-_c3-pad1_ Q2N2222
+q18 net-_c4-pad2_ net-_q15-pad1_ net-_q18-pad3_ Q2N2222
+r13 net-_c3-pad1_ net-_c1-pad2_ 5k
+c3 net-_c3-pad1_ net-_c1-pad2_ 15p
+r15 net-_q18-pad3_ net-_c1-pad2_ 5k
+q23 net-_q21-pad1_ net-_q17-pad2_ net-_j1-pad3_ Q2N2907A
+q27 net-_q17-pad2_ net-_q17-pad2_ net-_j1-pad3_ Q2N2907A
+q25 net-_j1-pad3_ net-_q21-pad1_ net-_q25-pad3_ Q2N2222
+q21 net-_q21-pad1_ net-_q21-pad1_ net-_q21-pad3_ Q2N2222
+q24 net-_q21-pad1_ net-_q21-pad3_ net-_c4-pad1_ Q2N2222
+r18 net-_q21-pad3_ net-_c4-pad1_ 50k
+c4 net-_c4-pad1_ net-_c4-pad2_ 15p
+d2 net-_c4-pad2_ net-_c4-pad1_ 1N4148
+q20 net-_j1-pad3_ net-_c4-pad2_ net-_q20-pad3_ Q2N2222
+r16 net-_q20-pad3_ net-_c1-pad2_ 50k
+r19 net-_q25-pad3_ net-_r19-pad2_ 27
+r20 net-_r19-pad2_ net-_q26-pad3_ 27
+q26 net-_c1-pad2_ net-_c4-pad1_ net-_q26-pad3_ Q2N2907A
+q22 net-_c4-pad1_ net-_q20-pad3_ net-_c1-pad2_ Q2N2222
+q28 net-_q17-pad2_ net-_j2-pad1_ net-_q28-pad3_ Q2N2222
+r22 net-_q28-pad3_ net-_c1-pad2_ 5.8k
+j2 net-_j2-pad1_ net-_c1-pad2_ net-_j1-pad3_ J2N3819
+* u3 net-_c1-pad2_ net-_j2-pad1_ zener
+r21 net-_r21-pad1_ net-_r19-pad2_ 120
+* u1 net-_r10-pad1_ net-_q1-pad2_ net-_q5-pad2_ net-_c1-pad2_ net-_q19-pad2_ net-_q15-pad2_ net-_r21-pad1_ net-_j1-pad3_ port
+a1 net-_c1-pad2_ net-_j1-pad1_ u2
+a2 net-_c1-pad2_ net-_j2-pad1_ u3
+* Schematic Name: zener, NgSpice Name: zener
+.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.pro b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sch b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sch
new file mode 100644
index 00000000..9133b092
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sch
@@ -0,0 +1,1107 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:RC4559N_IC-cache
+EELAYER 25 0
+EELAYER END
+$Descr User 27559 19685
+encoding utf-8
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+ 0 1 -1 0
+$EndComp
+$Comp
+L resistor R21
+U 1 1 66744C45
+P 20400 8850
+F 0 "R21" H 20450 8980 50 0000 C CNN
+F 1 "120" H 20450 8800 50 0000 C CNN
+F 2 "" H 20450 8830 30 0000 C CNN
+F 3 "" V 20450 8900 30 0000 C CNN
+ 1 20400 8850
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 8050 7150 8050 7000
+Wire Wire Line
+ 7750 7700 8750 7700
+Wire Wire Line
+ 7750 7700 7750 7750
+Wire Wire Line
+ 8050 7550 8050 7700
+Connection ~ 8050 7700
+Wire Wire Line
+ 8050 9600 8450 9600
+Wire Wire Line
+ 7750 8150 7750 9400
+Wire Wire Line
+ 8150 9600 8150 9300
+Wire Wire Line
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+Connection ~ 7750 9300
+Connection ~ 8150 9600
+Wire Wire Line
+ 7750 10050 7750 9800
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7750 9950
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 11050 7900
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 10600 8200 11050 8200
+Connection ~ 11050 8200
+Connection ~ 10300 8600
+Wire Wire Line
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+Connection ~ 8750 9350
+Wire Wire Line
+ 8950 9100 8750 9100
+Connection ~ 8750 9100
+Wire Wire Line
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+Connection ~ 9600 6700
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 8850 9100
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+Wire Wire Line
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+Connection ~ 10950 6700
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+Wire Wire Line
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+Wire Wire Line
+ 9850 9400 9850 9100
+Wire Wire Line
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+Wire Wire Line
+ 9250 8850 9400 8850
+Wire Wire Line
+ 9400 8850 9400 9100
+Connection ~ 9400 9100
+Wire Wire Line
+ 10300 9200 10300 9400
+Connection ~ 10300 9400
+Wire Wire Line
+ 11050 8800 11050 9400
+Connection ~ 11050 9400
+Wire Wire Line
+ 9600 9950 9600 9550
+Wire Wire Line
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+Connection ~ 9600 9800
+Wire Wire Line
+ 10900 10450 10900 10000
+Connection ~ 9600 10450
+Wire Wire Line
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+Connection ~ 10900 10450
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 12600 6700 12600 7150
+Connection ~ 11800 6700
+Wire Wire Line
+ 12600 8650 12600 7550
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 11800 10450
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 13300 8850
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 12600 7700
+Connection ~ 12200 7350
+Wire Wire Line
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+Connection ~ 11800 8700
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 10900 9400
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+Connection ~ 7750 10450
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 18500 8800
+Wire Wire Line
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+Connection ~ 16950 9550
+Wire Wire Line
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+Connection ~ 16950 9300
+Wire Wire Line
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+Connection ~ 17800 6900
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 17050 9300
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 19150 6900
+Wire Wire Line
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+ 18050 9600 18050 9300
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 17600 9300
+Wire Wire Line
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+Connection ~ 18500 9600
+Wire Wire Line
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+Connection ~ 19250 9600
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 17800 10000
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 19100 10650
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 20000 9400 20000 9300
+Wire Wire Line
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+Connection ~ 20000 6900
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 20000 10650
+Wire Wire Line
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+Wire Wire Line
+ 21100 9050 21500 9050
+Connection ~ 21500 9050
+Wire Wire Line
+ 21500 10650 21500 9650
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+Wire Wire Line
+ 21500 6900 21500 8200
+Connection ~ 20800 6900
+Wire Wire Line
+ 21800 8400 21950 8400
+Wire Wire Line
+ 21950 8400 21950 10650
+Connection ~ 21500 10650
+Wire Wire Line
+ 20400 7550 20400 7900
+Wire Wire Line
+ 20400 7900 20800 7900
+Connection ~ 20800 7900
+Connection ~ 20400 7550
+Wire Wire Line
+ 20200 8900 20000 8900
+Connection ~ 20000 8900
+Wire Wire Line
+ 20500 8900 22300 8900
+Wire Wire Line
+ 19100 9800 19100 9600
+Connection ~ 19100 9600
+Connection ~ 16250 6900
+Connection ~ 15950 10650
+Wire Wire Line
+ 17450 8150 17250 8150
+Wire Wire Line
+ 15200 6900 21500 6900
+Wire Wire Line
+ 15200 5300 15200 6900
+Wire Wire Line
+ 6200 5300 15200 5300
+Wire Wire Line
+ 21950 10650 7700 10650
+Wire Wire Line
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+Wire Wire Line
+ 6200 5300 6200 6750
+Wire Wire Line
+ 6200 6750 6450 6750
+Connection ~ 6450 6750
+Connection ~ 7700 10650
+Wire Wire Line
+ 6800 7950 7450 7950
+Wire Wire Line
+ 15000 8150 15650 8150
+Wire Wire Line
+ 7700 10450 7700 10750
+$Comp
+L PORT U1
+U 1 1 66746E63
+P 14350 8700
+F 0 "U1" H 14400 8800 30 0000 C CNN
+F 1 "PORT" H 14350 8700 30 0000 C CNN
+F 2 "" H 14350 8700 60 0000 C CNN
+F 3 "" H 14350 8700 60 0000 C CNN
+ 1 14350 8700
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 66747237
+P 6550 7950
+F 0 "U1" H 6600 8050 30 0000 C CNN
+F 1 "PORT" H 6550 7950 30 0000 C CNN
+F 2 "" H 6550 7950 60 0000 C CNN
+F 3 "" H 6550 7950 60 0000 C CNN
+ 2 6550 7950
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 667472F4
+P 7700 11000
+F 0 "U1" H 7750 11100 30 0000 C CNN
+F 1 "PORT" H 7700 11000 30 0000 C CNN
+F 2 "" H 7700 11000 60 0000 C CNN
+F 3 "" H 7700 11000 60 0000 C CNN
+ 4 7700 11000
+ 0 -1 -1 0
+$EndComp
+$Comp
+L PORT U1
+U 3 1 66747403
+P 9500 7950
+F 0 "U1" H 9550 8050 30 0000 C CNN
+F 1 "PORT" H 9500 7950 30 0000 C CNN
+F 2 "" H 9500 7950 60 0000 C CNN
+F 3 "" H 9500 7950 60 0000 C CNN
+ 3 9500 7950
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 66747B3E
+P 17700 8150
+F 0 "U1" H 17750 8250 30 0000 C CNN
+F 1 "PORT" H 17700 8150 30 0000 C CNN
+F 2 "" H 17700 8150 60 0000 C CNN
+F 3 "" H 17700 8150 60 0000 C CNN
+ 5 17700 8150
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 66747BED
+P 14750 8150
+F 0 "U1" H 14800 8250 30 0000 C CNN
+F 1 "PORT" H 14750 8150 30 0000 C CNN
+F 2 "" H 14750 8150 60 0000 C CNN
+F 3 "" H 14750 8150 60 0000 C CNN
+ 6 14750 8150
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 66748118
+P 6450 7250
+F 0 "U1" H 6500 7350 30 0000 C CNN
+F 1 "PORT" H 6450 7250 30 0000 C CNN
+F 2 "" H 6450 7250 60 0000 C CNN
+F 3 "" H 6450 7250 60 0000 C CNN
+ 8 6450 7250
+ 0 -1 -1 0
+$EndComp
+$Comp
+L PORT U1
+U 7 1 6674854A
+P 22550 8900
+F 0 "U1" H 22600 9000 30 0000 C CNN
+F 1 "PORT" H 22550 8900 30 0000 C CNN
+F 2 "" H 22550 8900 60 0000 C CNN
+F 3 "" H 22550 8900 60 0000 C CNN
+ 7 22550 8900
+ -1 0 0 1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sub b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sub
new file mode 100644
index 00000000..46e87586
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC.sub
@@ -0,0 +1,72 @@
+* Subcircuit RC4559N_IC
+.subckt RC4559N_IC net-_r10-pad1_ net-_q1-pad2_ net-_q5-pad2_ net-_c1-pad2_ net-_q19-pad2_ net-_q15-pad2_ net-_r21-pad1_ net-_j1-pad3_
+* d:\fossee\esim\library\subcircuitlibrary\rc4559n_ic\rc4559n_ic.cir
+.include NPN.lib
+.include PNP.lib
+.include NJF.lib
+.include D.lib
+r3 net-_j1-pad3_ net-_q3-pad3_ 8.7k
+q3 net-_q1-pad3_ net-_q13-pad1_ net-_q3-pad3_ Q2N2907A
+q5 net-_c2-pad2_ net-_q5-pad2_ net-_q1-pad3_ Q2N2907A
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A
+q2 net-_q1-pad1_ net-_q1-pad1_ net-_c1-pad1_ Q2N2222
+q4 net-_c2-pad2_ net-_q1-pad1_ net-_q4-pad3_ Q2N2222
+r2 net-_c1-pad1_ net-_c1-pad2_ 5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 15p
+r4 net-_q4-pad3_ net-_c1-pad2_ 5k
+q9 net-_q10-pad1_ net-_q13-pad1_ net-_j1-pad3_ Q2N2907A
+q13 net-_q13-pad1_ net-_q13-pad1_ net-_j1-pad3_ Q2N2907A
+q11 net-_j1-pad3_ net-_q10-pad1_ net-_q11-pad3_ Q2N2222
+q7 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad2_ Q2N2222
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_c2-pad1_ Q2N2222
+r7 net-_q10-pad2_ net-_c2-pad1_ 50k
+c2 net-_c2-pad1_ net-_c2-pad2_ 15p
+d1 net-_c2-pad2_ net-_c2-pad1_ 1N4148
+q6 net-_j1-pad3_ net-_c2-pad2_ net-_q6-pad3_ Q2N2222
+r6 net-_q6-pad3_ net-_c1-pad2_ 50k
+r8 net-_q11-pad3_ net-_r10-pad2_ 27
+r9 net-_r10-pad2_ net-_q12-pad3_ 27
+q12 net-_c1-pad2_ net-_c2-pad1_ net-_q12-pad3_ Q2N2907A
+q8 net-_c2-pad1_ net-_q6-pad3_ net-_c1-pad2_ Q2N2222
+q14 net-_q13-pad1_ net-_j1-pad1_ net-_q14-pad3_ Q2N2222
+r11 net-_q14-pad3_ net-_c1-pad2_ 5.8k
+j1 net-_j1-pad1_ net-_c1-pad2_ net-_j1-pad3_ J2N3819
+* u2 net-_c1-pad2_ net-_j1-pad1_ zener
+r10 net-_r10-pad1_ net-_r10-pad2_ 120
+r14 net-_j1-pad3_ net-_q17-pad3_ 8.7k
+q17 net-_q15-pad3_ net-_q17-pad2_ net-_q17-pad3_ Q2N2907A
+q19 net-_c4-pad2_ net-_q19-pad2_ net-_q15-pad3_ Q2N2907A
+q15 net-_q15-pad1_ net-_q15-pad2_ net-_q15-pad3_ Q2N2907A
+q16 net-_q15-pad1_ net-_q15-pad1_ net-_c3-pad1_ Q2N2222
+q18 net-_c4-pad2_ net-_q15-pad1_ net-_q18-pad3_ Q2N2222
+r13 net-_c3-pad1_ net-_c1-pad2_ 5k
+c3 net-_c3-pad1_ net-_c1-pad2_ 15p
+r15 net-_q18-pad3_ net-_c1-pad2_ 5k
+q23 net-_q21-pad1_ net-_q17-pad2_ net-_j1-pad3_ Q2N2907A
+q27 net-_q17-pad2_ net-_q17-pad2_ net-_j1-pad3_ Q2N2907A
+q25 net-_j1-pad3_ net-_q21-pad1_ net-_q25-pad3_ Q2N2222
+q21 net-_q21-pad1_ net-_q21-pad1_ net-_q21-pad3_ Q2N2222
+q24 net-_q21-pad1_ net-_q21-pad3_ net-_c4-pad1_ Q2N2222
+r18 net-_q21-pad3_ net-_c4-pad1_ 50k
+c4 net-_c4-pad1_ net-_c4-pad2_ 15p
+d2 net-_c4-pad2_ net-_c4-pad1_ 1N4148
+q20 net-_j1-pad3_ net-_c4-pad2_ net-_q20-pad3_ Q2N2222
+r16 net-_q20-pad3_ net-_c1-pad2_ 50k
+r19 net-_q25-pad3_ net-_r19-pad2_ 27
+r20 net-_r19-pad2_ net-_q26-pad3_ 27
+q26 net-_c1-pad2_ net-_c4-pad1_ net-_q26-pad3_ Q2N2907A
+q22 net-_c4-pad1_ net-_q20-pad3_ net-_c1-pad2_ Q2N2222
+q28 net-_q17-pad2_ net-_j2-pad1_ net-_q28-pad3_ Q2N2222
+r22 net-_q28-pad3_ net-_c1-pad2_ 5.8k
+j2 net-_j2-pad1_ net-_c1-pad2_ net-_j1-pad3_ J2N3819
+* u3 net-_c1-pad2_ net-_j2-pad1_ zener
+r21 net-_r21-pad1_ net-_r19-pad2_ 120
+a1 net-_c1-pad2_ net-_j1-pad1_ u2
+a2 net-_c1-pad2_ net-_j2-pad1_ u3
+* Schematic Name: zener, NgSpice Name: zener
+.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Control Statements
+
+.ends RC4559N_IC \ No newline at end of file
diff --git a/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC_Previous_Values.xml b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC_Previous_Values.xml
new file mode 100644
index 00000000..e1685a88
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/RC4559N_IC_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">zener<field1 name="Enter Breakdown Voltage (default=5.6)" /><field2 name="Enter Breakdown Current (default=2.0e-2)" /><field3 name="Enter Saturation Current (default=1.0e-12)" /><field4 name="Enter Forward Emission Coefficient (default=1.0)" /><field5 name="Enter Switch for Limiting (default=FALSE)" /></u2><u3 name="type">zener<field6 name="Enter Breakdown Voltage (default=5.6)" /><field7 name="Enter Breakdown Current (default=2.0e-2)" /><field8 name="Enter Saturation Current (default=1.0e-12)" /><field9 name="Enter Forward Emission Coefficient (default=1.0)" /><field10 name="Enter Switch for Limiting (default=FALSE)" /></u3></model><devicemodel><q3><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q5><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q4><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q9><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q9><q13><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q13><q11><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><q7><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q10><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><d1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><q6><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><q12><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q8><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8><q14><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q14><j1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j1><q17><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q17><q19><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q19><q15><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q15><q16><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q16><q18><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q18><q23><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q23><q27><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q27><q25><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q25><q21><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q21><q24><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q24><d2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><q20><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q20><q26><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q26><q22><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q22><q28><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q28><j2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j2></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/RC4559N_sub/analysis b/library/SubcircuitLibrary/RC4559N_sub/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/RC4559N_sub/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
generated by cgit (git 2.34.1) at 2024-12-19 09:55:49 +0000