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| author | fahimkhan | 2016-03-14 16:37:03 +0530 |
|---|---|---|
| committer | fahimkhan | 2016-03-14 16:37:03 +0530 |
| commit | 0767e64446641553c7c08c77b53d4817599c4ae1 (patch) | |
| tree | ccc60cf033e7d1f56fe52633462c9e659de8af1d /FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir | |
| parent | 9182fa7645ca28bd5d2d8401c2e2f03c39943f92 (diff) | |
| download | eSim-Examples-0767e64446641553c7c08c77b53d4817599c4ae1.tar.gz eSim-Examples-0767e64446641553c7c08c77b53d4817599c4ae1.tar.bz2 eSim-Examples-0767e64446641553c7c08c77b53d4817599c4ae1.zip | |
Adding all available eSim examples
Diffstat (limited to 'FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir')
| -rw-r--r-- | FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir b/FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir new file mode 100644 index 0000000..4d6657c --- /dev/null +++ b/FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir @@ -0,0 +1,21 @@ +* /home/fossee/UpdatedExamples/FullwaveRectifier_SCR/FullwaveRectifier_SCR.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar 3 21:30:23 2016 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +x1 GND pulse out2 SCR +v1 in1 in2 sine +v2 pulse GND pulse +D1 in1 out1 D +D3 in2 out1 D +D2 GND in1 D +D4 GND in2 D +R1 out1 out2 100 +U1 in1 in2 plot_v2 +U3 pulse plot_v1 +U2 out1 out2 plot_v2 + +.end |