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| author | sashi20 | 2020-04-23 17:03:58 +0530 |
|---|---|---|
| committer | sashi20 | 2020-04-23 17:03:58 +0530 |
| commit | 4df2fcdb711f02b08dbc8cea88b39d64a79b17aa (patch) | |
| tree | 239a6c0e0648d284abb7048811ed9c94dcb601f9 | |
| download | eSim-Circuit-Simulations-4df2fcdb711f02b08dbc8cea88b39d64a79b17aa.tar.gz eSim-Circuit-Simulations-4df2fcdb711f02b08dbc8cea88b39d64a79b17aa.tar.bz2 eSim-Circuit-Simulations-4df2fcdb711f02b08dbc8cea88b39d64a79b17aa.zip | |
first commit
_By_Mr_Sumanto_Kar/123345.png?id=4df2fcdb711f02b08dbc8cea88b39d64a79b17aa){kind=link}
_With_Inductive_Load._By_Ms_Mayuri_Bagnar/rect8.png?id=4df2fcdb711f02b08dbc8cea88b39d64a79b17aa){kind=link}
693 files changed, 936 insertions, 0 deletions
diff --git a/1.clipper_Circuit_Using_Op-Amp
2.clamper_Circuit_Using_Op-Amp
3.absolute_Value_Circuit_Using_Op-Amp
4.peak_Detector
5.sample_And_Hold_Circuit.
6.free_Running_Ramp_Generator_Using_555_Timer_By_Mr_Aravintha_Raju_R/Result.jpg b/1.clipper_Circuit_Using_Op-Amp
2.clamper_Circuit_Using_Op-Amp
3.absolute_Value_Circuit_Using_Op-Amp
4.peak_Detector
5.sample_And_Hold_Circuit.
6.free_Running_Ramp_Generator_Using_555_Timer_By_Mr_Aravintha_Raju_R/Result.jpg Binary files differnew file mode 100755 index 0000000..4c34858 --- /dev/null +++ b/1.clipper_Circuit_Using_Op-Amp 2.clamper_Circuit_Using_Op-Amp 3.absolute_Value_Circuit_Using_Op-Amp 4.peak_Detector 5.sample_And_Hold_Circuit. 6.free_Running_Ramp_Generator_Using_555_Timer_By_Mr_Aravintha_Raju_R/Result.jpg diff --git a/12_Volt_And_5_Volt_Power_Supply_By_Mr_Shekhar_Maruti_Nandanwar/12vand5vpowersupply.jpg b/12_Volt_And_5_Volt_Power_Supply_By_Mr_Shekhar_Maruti_Nandanwar/12vand5vpowersupply.jpg Binary files differnew file mode 100755 index 0000000..7f093d5 --- /dev/null +++ b/12_Volt_And_5_Volt_Power_Supply_By_Mr_Shekhar_Maruti_Nandanwar/12vand5vpowersupply.jpg diff --git a/12_Volt_To_5_Volt_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/12Volt_to_5Volt_circuit.png b/12_Volt_To_5_Volt_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/12Volt_to_5Volt_circuit.png Binary files differnew file mode 100755 index 0000000..71bc6ab --- /dev/null +++ b/12_Volt_To_5_Volt_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/12Volt_to_5Volt_circuit.png diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/123345.png b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/123345.png Binary files differnew file mode 100755 index 0000000..bc04daf --- /dev/null +++ b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/123345.png diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/README.txt b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/README.txt new file mode 100755 index 0000000..0d36d6b --- /dev/null +++ b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 2:1 MUX Using Transmission Gate(using 0.5um Technology) +Proposar Name: Mr Sumanto Kar +University: Fr. Conceicao Rodrigues College Of Engineering, Bandra + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/2_1mux.zip b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/2_1mux.zip Binary files differnew file mode 100755 index 0000000..adbf7d2 --- /dev/null +++ b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/2_1mux.zip diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/Abstract_2_1mux.pdf b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/Abstract_2_1mux.pdf Binary files differnew file mode 100755 index 0000000..82d6315 --- /dev/null +++ b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/Abstract_2_1mux.pdf diff --git a/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/3phfullrect.pdf b/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/3phfullrect.pdf Binary files differnew file mode 100755 index 0000000..e3cf068 --- /dev/null +++ b/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/3phfullrect.pdf diff --git a/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/README.txt b/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/README.txt new file mode 100755 index 0000000..48fdc8f --- /dev/null +++ b/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 3 Phase Fully Controlled Rectifier +Proposar Name: Mr Jesus Bobin V +University: St.xavier'S Catholic College Of Engineering + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/project_files/3phctrlrect.zip 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b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/README.txt new file mode 100755 index 0000000..ad1a347 --- /dev/null +++ b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 3 Phase Uncontrolled Rectifier +Proposar Name: Mr Jesus Bobin +University: St. Xavier's Catholic College Of Engineering + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrect.zip b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrect.zip Binary files differnew file mode 100755 index 0000000..740a17a --- /dev/null +++ b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrect.zip diff --git a/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrectifier.pdf b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrectifier.pdf Binary files differnew file mode 100755 index 0000000..41f8eed --- /dev/null +++ b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrectifier.pdf diff --git a/4:16_Demultiplexer_By_Mr_Akshay_N._H./ABSTRACT.pdf b/4:16_Demultiplexer_By_Mr_Akshay_N._H./ABSTRACT.pdf Binary files differnew file mode 100755 index 0000000..ba34917 --- /dev/null +++ b/4:16_Demultiplexer_By_Mr_Akshay_N._H./ABSTRACT.pdf diff --git a/4:16_Demultiplexer_By_Mr_Akshay_N._H./README.txt b/4:16_Demultiplexer_By_Mr_Akshay_N._H./README.txt new file mode 100755 index 0000000..53b72d3 --- /dev/null +++ b/4:16_Demultiplexer_By_Mr_Akshay_N._H./README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 4:16 Demultiplexer +Proposar Name: Mr Akshay Nh +University: Pes University + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/4to16demultiplexer.zip b/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/4to16demultiplexer.zip Binary files differnew file mode 100755 index 0000000..328db30 --- /dev/null +++ b/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/4to16demultiplexer.zip diff --git a/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/ABSTRACT.pdf b/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/ABSTRACT.pdf Binary files differnew file mode 100755 index 0000000..ba34917 --- /dev/null +++ b/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/ABSTRACT.pdf diff --git a/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/README.txt new file mode 100755 index 0000000..31ed3a4 --- /dev/null +++ b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 4 Bit Synchronous Down-Counter +Proposar Name: Dr Maheswari R +University: VIT Chennai + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/Synchronous4BitDownCounter.pdf b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/Synchronous4BitDownCounter.pdf Binary files differnew file mode 100755 index 0000000..54d0f1a --- /dev/null +++ b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/Synchronous4BitDownCounter.pdf diff --git a/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/project_files/Synchronous4BitDownCounter.pdf b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/project_files/Synchronous4BitDownCounter.pdf Binary files differnew file mode 100755 index 0000000..54d0f1a --- /dev/null +++ b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/project_files/Synchronous4BitDownCounter.pdf diff --git a/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/project_files/counter.zip b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/project_files/counter.zip Binary files differnew file mode 100755 index 0000000..f02fa73 --- /dev/null +++ b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/project_files/counter.zip diff --git a/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/PIPO.pdf b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/PIPO.pdf Binary files differnew file mode 100755 index 0000000..4a01963 --- /dev/null +++ b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/PIPO.pdf diff --git a/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/README.txt new file mode 100755 index 0000000..25fc2dc --- /dev/null +++ b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 4 Bit Synchronous Parallel In Parallel Out Register +Proposar Name: Dr Maheswari R +University: VIT Chennai + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.pdf b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.pdf Binary files differnew file mode 100755 index 0000000..4a01963 --- /dev/null +++ b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.pdf diff --git a/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.zip b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.zip Binary files differnew file mode 100755 index 0000000..adb6407 --- /dev/null +++ b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.zip diff --git a/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/README.txt new file mode 100755 index 0000000..580188e --- /dev/null +++ b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 4 Bit Synchronous Serial In Parallel Out (SIPO) Shift Register +Proposar Name: Dr Maheswari R +University: VIT Chennai + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/SIPO.pdf b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/SIPO.pdf Binary files differnew file mode 100755 index 0000000..6961031 --- /dev/null +++ b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/SIPO.pdf diff --git a/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/project_files/SIPO.pdf b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/project_files/SIPO.pdf Binary files differnew file mode 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Serial In Serial Out Shift Register +Proposar Name: Dr Maheswari R +University: Vit Chennai + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/SISOShiftRegister.pdf b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/SISOShiftRegister.pdf Binary files differnew file mode 100755 index 0000000..d0df0a6 --- /dev/null +++ b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/SISOShiftRegister.pdf diff --git a/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/project_files/SISOShiftRegister_new.pdf b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/project_files/SISOShiftRegister_new.pdf Binary files differnew file mode 100755 index 0000000..a3f63fe --- /dev/null +++ b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/project_files/SISOShiftRegister_new.pdf diff --git a/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/project_files/siso_new.zip b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/project_files/siso_new.zip Binary files differnew file mode 100755 index 0000000..c5146d9 --- /dev/null +++ b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/project_files/siso_new.zip diff --git a/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt new file mode 100755 index 0000000..67fd702 --- /dev/null +++ b/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 4 Bit Synchronous Up-Counter +Proposar Name: Dr Maheswari R +University: Vit Chennai + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/Synchronous4BitCounter.pdf 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a/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/7485ref.JPG b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/7485ref.JPG Binary files differnew file mode 100755 index 0000000..c8023ef --- /dev/null +++ b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/7485ref.JPG diff --git a/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt new file mode 100755 index 0000000..0fe6bef --- /dev/null +++ b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: 8 Bit Comparator using 7485 IC +Proposar Name: Mr Padigepati Mallikarjuna Reddy +University: National Institute Of Technology Durgapur + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git 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+1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Amplitude_shift_keying +Proposar Name: Ms Karthika K +University: K S Rangasamy College Of Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.pdf b/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.pdf Binary files differnew file mode 100755 index 0000000..40c9e42 --- /dev/null +++ b/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.pdf diff --git a/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.zip b/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.zip Binary files differnew file mode 100755 index 0000000..2dc6d09 --- /dev/null +++ b/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.zip diff --git a/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/README.txt b/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/README.txt new file mode 100755 index 0000000..0abadbf --- /dev/null +++ b/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Analog Multiplier Using Operational Amplifier +Proposar Name: Mr Shekhar Maruti Nandanwar +University: Kc College Of Engineering And Management Studies And Research + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/multiplier.pdf b/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/multiplier.pdf Binary files differnew file mode 100755 index 0000000..5739540 --- /dev/null +++ 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a/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/README.txt b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/README.txt new file mode 100755 index 0000000..91335e0 --- /dev/null +++ b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Analysis Of Astable Multivibrator Using Transistors +Proposar Name: Mr Vishnu Mohan +University: College Of Engineering Vadakara + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/astable.pdf b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/astable.pdf Binary files differnew file mode 100755 index 0000000..46c4b2f --- /dev/null +++ b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/astable.pdf diff --git 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Conceicao Rodrigues College Of Engineering, Bandra + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Bistable_Multivibrator_By_Mr_Sumanto_Kar/esim.jpg b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/esim.jpg Binary files differnew file mode 100755 index 0000000..e7be7da --- /dev/null +++ b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/esim.jpg diff --git a/Bistable_Multivibrator_By_Mr_Sumanto_Kar/project_files/Bistable_Multivibrator.pdf b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/project_files/Bistable_Multivibrator.pdf Binary files differnew file mode 100755 index 0000000..9d281ac --- /dev/null +++ b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/project_files/Bistable_Multivibrator.pdf diff --git a/Bistable_Multivibrator_By_Mr_Sumanto_Kar/project_files/Bistable_Multivibrator.zip b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/project_files/Bistable_Multivibrator.zip Binary files differnew file mode 100755 index 0000000..a2e9833 --- /dev/null +++ b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/project_files/Bistable_Multivibrator.zip diff --git a/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/DifferentialAmplifier.jpg b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/DifferentialAmplifier.jpg Binary files differnew file mode 100755 index 0000000..128b557 --- /dev/null +++ b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/DifferentialAmplifier.jpg diff --git a/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/README.txt b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/README.txt new file mode 100755 index 0000000..8141d02 --- /dev/null +++ b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: BJT based Differential Amplifier +Proposar Name: Mr Sumanto Kar +University: Fr. Conceicao Rodrigues College Of Engineering, Bandra + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_BJT_based_Differential_Amplifier.pdf b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_BJT_based_Differential_Amplifier.pdf Binary files differnew file mode 100755 index 0000000..6fc104a --- /dev/null +++ b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_BJT_based_Differential_Amplifier.pdf diff --git a/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/BJT_based_Differential_Amplifier.zip b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/BJT_based_Differential_Amplifier.zip Binary files differnew file mode 100755 index 0000000..1392e50 --- /dev/null +++ b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/BJT_based_Differential_Amplifier.zip diff --git a/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/PPP.pdf b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/PPP.pdf Binary files differnew file mode 100755 index 0000000..068db21 --- /dev/null +++ b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/PPP.pdf diff --git a/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/README.txt b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/README.txt new file mode 100755 index 0000000..f8ba943 --- /dev/null +++ b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Boot Strap Amplifier Using BJT +Proposar Name: Ms P. Yogeshwari +University: Dr. Mahalingam College Of Engineering And Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/ABSTRACT.pdf b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/ABSTRACT.pdf Binary files differnew file mode 100755 index 0000000..fc9c132 --- /dev/null +++ b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/ABSTRACT.pdf diff --git a/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/fff.zip b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/fff.zip Binary files differnew file mode 100755 index 0000000..4224912 --- /dev/null +++ b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/fff.zip diff --git a/Bootstrap_Amplifier_Circuit_Using_Transistors_By_Dr_Pallavi_Khare/BootstrapAmplifier.pdf b/Bootstrap_Amplifier_Circuit_Using_Transistors_By_Dr_Pallavi_Khare/BootstrapAmplifier.pdf Binary files differnew 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Vit Vellore + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./carry_select_adder_using_bec_logic.pdf b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./carry_select_adder_using_bec_logic.pdf Binary files differnew file mode 100755 index 0000000..dd1e021 --- /dev/null +++ b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./carry_select_adder_using_bec_logic.pdf diff --git a/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./project_files/Carry_Select_Adder_Using_BEC_Logic.zip b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./project_files/Carry_Select_Adder_Using_BEC_Logic.zip Binary files differnew file mode 100755 index 0000000..5b691f3 --- /dev/null +++ b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./project_files/Carry_Select_Adder_Using_BEC_Logic.zip diff --git a/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./project_files/carry_select_adder_using_bec_logic.pdf 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+Title Of The Circuit Simulation Project: Clapps Oscillator +Proposar Name: Ms Shubangi Mahajan +University: Indian Institute Of Information Technology, Trichy + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappOscillator.zip b/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappOscillator.zip Binary files differnew file mode 100755 index 0000000..bdbf965 --- /dev/null +++ b/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappOscillator.zip diff --git a/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappsOscillator.pdf b/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappsOscillator.pdf Binary files differnew file mode 100755 index 0000000..6340c64 --- /dev/null +++ b/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappsOscillator.pdf diff --git a/Class_A_Amplifier_By_Ms_Karthika_K./Circuit.jpg b/Class_A_Amplifier_By_Ms_Karthika_K./Circuit.jpg Binary files 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Conceicao Rodrigues College Of Engineering, Bandra + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_Class_AB_Amplifier.pdf b/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_Class_AB_Amplifier.pdf Binary files differnew file mode 100755 index 0000000..7111eee --- /dev/null +++ b/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_Class_AB_Amplifier.pdf diff --git a/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Class_AB_Amplifier.zip b/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Class_AB_Amplifier.zip Binary files differnew file mode 100755 index 0000000..836e198 --- /dev/null +++ b/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Class_AB_Amplifier.zip diff --git a/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/README.txt b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/README.txt new file mode 100755 index 0000000..0b92cbf --- /dev/null +++ b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Class B Push Pull Amplifier +Proposar Name: Mr Mohammmed Zubair Kasab +University: Mvj College Of Engineering, Bangalore + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/maxresdefault.jpg b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/maxresdefault.jpg Binary files differnew file mode 100755 index 0000000..37c663b --- /dev/null +++ b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/maxresdefault.jpg diff --git a/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/project_files/abstractclassb.pdf b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/project_files/abstractclassb.pdf Binary files differnew file mode 100755 index 0000000..8eb326b --- /dev/null +++ b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/project_files/abstractclassb.pdf diff --git a/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/project_files/classb.zip b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/project_files/classb.zip Binary files differnew file mode 100755 index 0000000..ce96e65 --- /dev/null +++ b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/project_files/classb.zip diff --git a/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/123345.png b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/123345.png Binary files differnew file mode 100755 index 0000000..295a076 --- /dev/null +++ b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/123345.png diff --git a/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/README.txt b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/README.txt new file mode 100755 index 0000000..752fe8b --- /dev/null +++ b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: CMOS NAND Gate Using 0.5um Technology +Proposar Name: Mr Sumanto Kar +University: Fr. Conceicao Rodrigues College Of Engineering, Bandra + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/Abstract_CMOS_NAND_Gate123.pdf b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/Abstract_CMOS_NAND_Gate123.pdf Binary files differnew file mode 100755 index 0000000..fdbc4c0 --- /dev/null +++ b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/Abstract_CMOS_NAND_Gate123.pdf diff --git a/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/CMOS_NAND_Gate123.zip b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/CMOS_NAND_Gate123.zip Binary files differnew file mode 100755 index 0000000..5cbe2dd --- /dev/null +++ b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/CMOS_NAND_Gate123.zip diff --git a/Common_Emitter_Amplifier_Using_Bc547_Transistor_By_Ms_Karthikpriya_M/CEamplifier.pdf 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b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Design Of 4 Bit ALU +Proposar Name: Mr Padigepati Mallikarjuna Reddy +University: National Institute Of Technology Durgapur + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_ALU.pdf b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_ALU.pdf Binary files differnew file mode 100755 index 0000000..4ef28fd --- /dev/null +++ b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_ALU.pdf diff --git a/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4bit_ALU.zip b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4bit_ALU.zip Binary files differnew file mode 100755 index 0000000..1e7c6e7 --- /dev/null +++ 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Reddy +University: National Institute Of Technology Durgapur + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FA.pdf b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FA.pdf Binary files differnew file mode 100755 index 0000000..f86e54f --- /dev/null +++ b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FA.pdf diff --git a/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FullAdder.zip b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FullAdder.zip Binary files differnew file mode 100755 index 0000000..00a5e1a --- /dev/null +++ b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FullAdder.zip diff --git a/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/74153.png b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/74153.png Binary files differnew file mode 100755 index 0000000..89b992d --- /dev/null +++ b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/74153.png diff --git a/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt new file mode 100755 index 0000000..d4b78a7 --- /dev/null +++ b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Design Of 74153 IC +Proposar Name: Mr Padigepati Mallikarjuna Reddy +University: National Institute Of Technollogy Durgapur + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/74153_ADual_4lineto1line_Multiplexer.pdf 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b/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/README.txt new file mode 100755 index 0000000..5f198e0 --- /dev/null +++ b/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Design Of Binary Phase Shift Keying (bpsk) Modulator & Demodulator Using eSim +Proposar Name: Prof Raghu K +University: Reva University + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/project_files/Design_Of_BPSK_by_Raghu.zip b/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/project_files/Design_Of_BPSK_by_Raghu.zip Binary files differnew file mode 100755 index 0000000..937be66 --- /dev/null +++ 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the Circuit Simulation + +Title Of The Circuit Simulation Project: Design Of Clipper Circuit Using eSim +Proposar Name: Ms A.aarthy K.c.charumathy R.genga Devi +University: Dr.mahalingam College Of Engineering And Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/clipper.pdf b/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/clipper.pdf Binary files differnew file mode 100755 index 0000000..92111a3 --- /dev/null +++ b/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/clipper.pdf diff --git a/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/project_files/SC.pdf b/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/project_files/SC.pdf Binary files differnew file mode 100755 index 0000000..b903aaf --- /dev/null +++ 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+University: Dr.mahalingam College Of Engineering And Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/colpitts.pdf b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/colpitts.pdf Binary files differnew file mode 100755 index 0000000..0d7ed22 --- /dev/null +++ b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/colpitts.pdf diff --git a/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/project_files/osc.pdf b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/project_files/osc.pdf Binary files differnew file mode 100755 index 0000000..6708e9a --- /dev/null +++ b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/project_files/osc.pdf diff --git a/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/project_files/osc.zip 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Second Order Lowpass Filter Circuit Using Op-Amp +Proposar Name: Mr A.mathiyazhagan +University: Dr.mahalingam College Of Engineering And Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/SECOND_ORDER_FILTER.pdf b/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/SECOND_ORDER_FILTER.pdf Binary files differnew file mode 100755 index 0000000..e1f5ecf --- /dev/null +++ b/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/SECOND_ORDER_FILTER.pdf diff --git a/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/project_files/SECOND_ORDER_FILTER.pdf b/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/project_files/SECOND_ORDER_FILTER.pdf Binary files differnew file mode 100755 index 0000000..e1f5ecf --- /dev/null +++ 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Simulation + +Title Of The Circuit Simulation Project: Design Of Two Bit Carry Look Ahead Adder Using eSim +Proposar Name: Mr Katakam V N Manikanta Bhargav +University: National Institute Of Technology Durgapur + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/cla.png b/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/cla.png Binary files differnew file mode 100755 index 0000000..a199c2c --- /dev/null +++ b/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/cla.png diff --git a/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/project_files/bhargav_cla_test.zip b/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/project_files/bhargav_cla_test.zip Binary files differnew file mode 100755 index 0000000..b84fc8a --- /dev/null +++ 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Capacitor Filter +Proposar Name: Ms Shubangi Mahajan +University: Indian Institute Of Information Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FWRusingCF.zip b/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FWRusingCF.zip Binary files differnew file mode 100755 index 0000000..949feb8 --- /dev/null +++ b/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FWRusingCF.zip diff --git a/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FullWaveRectifierWithCapacitorFilter.pdf b/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FullWaveRectifierWithCapacitorFilter.pdf Binary files differnew file mode 100755 index 0000000..4004ec5 --- /dev/null +++ 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Simulation Project By FOSSEE, IIT Bombay diff --git a/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATOR.zip b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATOR.zip Binary files differnew file mode 100755 index 0000000..f07d464 --- /dev/null +++ b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATOR.zip diff --git a/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATORABSTRACT.pdf b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATORABSTRACT.pdf Binary files differnew file mode 100755 index 0000000..4fd781b --- /dev/null +++ b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATORABSTRACT.pdf diff --git a/High_Pass_Filter_Design_Using_Op-Amp_By_Mr_V.soundarrajan,_S.gokul,_M.govindharajan/HPFusingopamp.jpg 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Conceicao Rodrigues College Of Engineering + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/lm2596.pdf b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/lm2596.pdf Binary files differnew file mode 100755 index 0000000..ed3ce26 --- /dev/null +++ b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/lm2596.pdf diff --git a/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/project_files/AbstractHighlyEfficientSwitchingModePowerSupplyUsingLM2596.pdf b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/project_files/AbstractHighlyEfficientSwitchingModePowerSupplyUsingLM2596.pdf Binary files differnew file mode 100755 index 0000000..6c25788 --- /dev/null +++ b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/project_files/AbstractHighlyEfficientSwitchingModePowerSupplyUsingLM2596.pdf diff --git a/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/project_files/Highly_Efficient_Switching_Mode_Power_Supply_Using_LM2596.zip b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/project_files/Highly_Efficient_Switching_Mode_Power_Supply_Using_LM2596.zip Binary files differnew file mode 100755 index 0000000..6d5831f --- /dev/null +++ b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/project_files/Highly_Efficient_Switching_Mode_Power_Supply_Using_LM2596.zip diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/555testingcircuit.jpg b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/555testingcircuit.jpg Binary files differnew file mode 100755 index 0000000..0b6f6c4 --- /dev/null +++ b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/555testingcircuit.jpg diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/README.txt b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/README.txt new file mode 100755 index 0000000..91ace02 --- /dev/null +++ b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: IC 555 Testing Circuit +Proposar Name: Mr Shekhar Maruti Nandanwar +University: Kc College Of Engineering And Management Studies And Research + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_TESTING_CIRCUIT.zip b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_TESTING_CIRCUIT.zip Binary files differnew file mode 100755 index 0000000..e16e998 --- /dev/null +++ b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_TESTING_CIRCUIT.zip diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_Testing_Circuit.pdf b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_Testing_Circuit.pdf Binary files differnew file mode 100755 index 0000000..a8835e0 --- /dev/null +++ b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_Testing_Circuit.pdf diff --git a/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/123345.jpg b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/123345.jpg Binary files differnew file mode 100755 index 0000000..b8c424e --- /dev/null +++ b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/123345.jpg diff --git a/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/README.txt b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/README.txt new file mode 100755 index 0000000..3064807 --- /dev/null +++ b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: IC LM317 Design And Implementation +Proposar Name: Mr Sumanto Kar +University: Fr. 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Project: Instrumentation Amplifier +Proposar Name: Mr Pranav M +University: Bms College Of Engineering + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/Instrumentation_Amplifier.pdf b/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/Instrumentation_Amplifier.pdf Binary files differnew file mode 100755 index 0000000..4ceafe2 --- /dev/null +++ b/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/Instrumentation_Amplifier.pdf diff --git a/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/instrumentation_amp.zip b/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/instrumentation_amp.zip Binary files differnew file mode 100755 index 0000000..d06d6bc --- /dev/null +++ b/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/instrumentation_amp.zip diff --git a/Integrator_Using_Opamp_In_Esim_By_Mrs_Gloria/Integrator_using_opamp_eSim.pdf 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Conceicao Rodrigues College Of Engineering, Bandra + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Abstract_Monostable_Multivibrator_Using_BJTs.pdf b/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Abstract_Monostable_Multivibrator_Using_BJTs.pdf Binary files differnew file mode 100755 index 0000000..9313dfd --- /dev/null +++ b/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Abstract_Monostable_Multivibrator_Using_BJTs.pdf diff --git a/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Monostable_Multivibrator_Using_BJTs.zip b/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Monostable_Multivibrator_Using_BJTs.zip Binary files differnew file mode 100755 index 0000000..71080b5 --- /dev/null +++ b/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Monostable_Multivibrator_Using_BJTs.zip diff --git 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a/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/README.txt b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/README.txt new file mode 100755 index 0000000..bf73864 --- /dev/null +++ b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Practical Cascode Amplifier +Proposar Name: Mr 1. Sai Prasad.n 2. Thamil Selvan P.s +University: Sri Ramakrishna Engineering College + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.pdf b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.pdf Binary files differnew file mode 100755 index 0000000..9e915cc --- /dev/null +++ b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.pdf diff --git a/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.zip b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.zip Binary files differnew file mode 100755 index 0000000..d8185ce --- /dev/null +++ b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.zip diff --git a/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./README.txt b/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./README.txt new file mode 100755 index 0000000..cffd542 --- /dev/null +++ b/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Preemphasis And Deemphasis Using Ic 741 Op Amp +Proposar Name: Mr Akshay Nh +University: Pes University + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./abstract.pdf b/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./abstract.pdf Binary files differnew file mode 100755 index 0000000..e4ff498 --- /dev/null +++ b/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./abstract.pdf diff --git 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C. Roy Polytechnic + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate.zip b/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate.zip Binary files differnew file mode 100755 index 0000000..20e7bb4 --- /dev/null +++ b/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate.zip diff --git a/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate_Design_and_Simulation_by_Atin.pdf b/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate_Design_and_Simulation_by_Atin.pdf Binary files differnew file mode 100755 index 0000000..cc5b701 --- /dev/null +++ b/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate_Design_and_Simulation_by_Atin.pdf diff --git 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diff --git a/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt b/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt new file mode 100755 index 0000000..b2955a1 --- /dev/null +++ b/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: RTL NOR Gate Design And Simulation +Proposar Name: Mr Atin Mukherjee +University: Dr. B.C.Roy Polytechnic + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/RTL_NOR.png b/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/RTL_NOR.png Binary files differnew file mode 100755 index 0000000..e7b8c14 --- /dev/null +++ b/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/RTL_NOR.png diff --git a/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_NOR.zip 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Nivitaa +University: Dr. Mahalingam College Of Engineering And Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/long.pdf b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/long.pdf Binary files differnew file mode 100755 index 0000000..da5cd71 --- /dev/null +++ b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/long.pdf diff --git a/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/project_files/ABSTRACT.pdf b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/project_files/ABSTRACT.pdf Binary files differnew file mode 100755 index 0000000..225d16b --- /dev/null +++ b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/project_files/ABSTRACT.pdf diff --git a/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/project_files/long.zip b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/project_files/long.zip Binary files differnew file mode 100755 index 0000000..b893d88 --- /dev/null +++ b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/project_files/long.zip diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/ESIM.pdf b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/ESIM.pdf Binary files differnew file mode 100755 index 0000000..e7899aa --- /dev/null +++ b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/ESIM.pdf diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/README.txt b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/README.txt new file mode 100755 index 0000000..a3d9824 --- /dev/null +++ b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/README.txt @@ -0,0 +1,8 @@ +About the Circuit Simulation + +Title Of The Circuit Simulation Project: Simple White Noise Generator +Proposar Name: Mr A.S. Arunprassath +University: Dr Mahalingam College Of Engineering And Technology + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/Abstract.pdf b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/Abstract.pdf Binary files differnew file mode 100755 index 0000000..3a5315b --- /dev/null +++ b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/Abstract.pdf diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/noise.zip b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/noise.zip Binary files differnew file mode 100755 index 0000000..7477ee3 --- /dev/null +++ b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/noise.zip diff --git a/Single_Stage_Common_Source_Mosfet_Amplifier_By_Mrs_Vaishali_Umesh_Gongane/CSamplifier.jpg b/Single_Stage_Common_Source_Mosfet_Amplifier_By_Mrs_Vaishali_Umesh_Gongane/CSamplifier.jpg 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Conceicao Rodrigues College Of Engineering + + +eSim Circuit Simulation Project By FOSSEE, IIT Bombay diff --git a/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.pdf b/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.pdf Binary files differnew file mode 100755 index 0000000..aa73a69 --- /dev/null +++ b/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.pdf diff --git a/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.zip b/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.zip Binary files differnew file mode 100755 index 0000000..6cd3859 --- /dev/null +++ b/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.zip diff --git a/Voltage_Doubler_And_Voltage_Tripler_Circuit_Using_Diode_By_Mr_Piyush_Ahuja/README.txt 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