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authorsashi202020-04-23 17:03:58 +0530
committersashi202020-04-23 17:03:58 +0530
commit4df2fcdb711f02b08dbc8cea88b39d64a79b17aa (patch)
tree239a6c0e0648d284abb7048811ed9c94dcb601f9
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diff --git a/1.clipper_Circuit_Using_Op-Amp 2.clamper_Circuit_Using_Op-Amp 3.absolute_Value_Circuit_Using_Op-Amp 4.peak_Detector 5.sample_And_Hold_Circuit. 6.free_Running_Ramp_Generator_Using_555_Timer_By_Mr_Aravintha_Raju_R/Result.jpg b/1.clipper_Circuit_Using_Op-Amp 2.clamper_Circuit_Using_Op-Amp 3.absolute_Value_Circuit_Using_Op-Amp 4.peak_Detector 5.sample_And_Hold_Circuit. 6.free_Running_Ramp_Generator_Using_555_Timer_By_Mr_Aravintha_Raju_R/Result.jpg
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diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/123345.png b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/123345.png
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diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/README.txt b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 2:1 MUX Using Transmission Gate(using 0.5um Technology)
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/2_1mux.zip b/2:1_Mux_Using_Transmission_Gate(using_0.5um_Technology)_By_Mr_Sumanto_Kar/project_files/2_1mux.zip
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diff --git a/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/3phfullrect.pdf b/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/3phfullrect.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 3 Phase Fully Controlled Rectifier
+Proposar Name: Mr Jesus Bobin V
+University: St.xavier'S Catholic College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/project_files/3phctrlrect.zip b/3_Phase_Fully_Controlled_Rectifier_By_Mr_Jesus_Bobin_V/project_files/3phctrlrect.zip
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diff --git a/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/3phrectifier.pdf b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/3phrectifier.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 3 Phase Uncontrolled Rectifier
+Proposar Name: Mr Jesus Bobin
+University: St. Xavier's Catholic College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrect.zip b/3_Phase_Uncontrolled_Rectifier_By_Mr_Jesus_Bobin/project_files/3phrect.zip
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diff --git a/4:16_Demultiplexer_By_Mr_Akshay_N._H./ABSTRACT.pdf b/4:16_Demultiplexer_By_Mr_Akshay_N._H./ABSTRACT.pdf
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index 0000000..53b72d3
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4:16 Demultiplexer
+Proposar Name: Mr Akshay Nh
+University: Pes University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/4to16demultiplexer.zip b/4:16_Demultiplexer_By_Mr_Akshay_N._H./project_files/4to16demultiplexer.zip
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diff --git a/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/README.txt
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--- /dev/null
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4 Bit Synchronous Down-Counter
+Proposar Name: Dr Maheswari R
+University: VIT Chennai
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/Synchronous4BitDownCounter.pdf b/4_Bit_Synchronous_Down-Counter_By_Dr_Maheswari_R/Synchronous4BitDownCounter.pdf
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diff --git a/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/PIPO.pdf b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/PIPO.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4 Bit Synchronous Parallel In Parallel Out Register
+Proposar Name: Dr Maheswari R
+University: VIT Chennai
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.pdf b/4_Bit_Synchronous_Parallel_In_Parallel_Out_Register_By_Dr_Maheswari_R/project_files/PIPO.pdf
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diff --git a/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4 Bit Synchronous Serial In Parallel Out (SIPO) Shift Register
+Proposar Name: Dr Maheswari R
+University: VIT Chennai
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/SIPO.pdf b/4_Bit_Synchronous_Serial_In_Parallel_Out_(sipo)_Shift_Register_By_Dr_Maheswari_R/SIPO.pdf
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diff --git a/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/README.txt
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--- /dev/null
+++ b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4 Bit Synchronous Serial In Serial Out Shift Register
+Proposar Name: Dr Maheswari R
+University: Vit Chennai
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/SISOShiftRegister.pdf b/4_Bit_Synchronous_Serial_In_Serial_Out_Shift_Register_By_Dr_Maheswari_R/SISOShiftRegister.pdf
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diff --git a/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt
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index 0000000..67fd702
--- /dev/null
+++ b/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4 Bit Synchronous Up-Counter
+Proposar Name: Dr Maheswari R
+University: Vit Chennai
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/Synchronous4BitCounter.pdf b/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/Synchronous4BitCounter.pdf
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diff --git a/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/7485ref.JPG b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/7485ref.JPG
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+++ b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 8 Bit Comparator using 7485 IC
+Proposar Name: Mr Padigepati Mallikarjuna Reddy
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/8bitComparator_using_7485.zip b/8_Bit_Comparator_Using_7485_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/8bitComparator_using_7485.zip
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+++ b/A_2-Bit_Binary_Adder_Subtractor_Circuit_By_Mr_Siddharth_Singha_Roy/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: A 2-Bit Binary Adder Subtractor Circuit
+Proposar Name: Mr Siddharth Singha Roy
+University: Vellore Institute Of Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/A_2-Bit_Binary_Adder_Subtractor_Circuit_By_Mr_Siddharth_Singha_Roy/project_files/AddSub.zip b/A_2-Bit_Binary_Adder_Subtractor_Circuit_By_Mr_Siddharth_Singha_Roy/project_files/AddSub.zip
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diff --git a/Amplitude_Shift_Keying_By_Ms_Karthika_K/ASK.jpg b/Amplitude_Shift_Keying_By_Ms_Karthika_K/ASK.jpg
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--- /dev/null
+++ b/Amplitude_Shift_Keying_By_Ms_Karthika_K/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Amplitude_shift_keying
+Proposar Name: Ms Karthika K
+University: K S Rangasamy College Of Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.pdf b/Amplitude_Shift_Keying_By_Ms_Karthika_K/project_files/Amplitude_Shift_Keying.pdf
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diff --git a/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/README.txt b/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/README.txt
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+++ b/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Analog Multiplier Using Operational Amplifier
+Proposar Name: Mr Shekhar Maruti Nandanwar
+University: Kc College Of Engineering And Management Studies And Research
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/multiplier.pdf b/Analog_Multiplier_Using_Operational_Amplifier_By_Mr_Shekhar_Maruti_Nandanwar/multiplier.pdf
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diff --git a/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/README.txt b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/README.txt
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--- /dev/null
+++ b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Analysis Of Astable Multivibrator Using Transistors
+Proposar Name: Mr Vishnu Mohan
+University: College Of Engineering Vadakara
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/astable.pdf b/Analysis_Of_Astable_Multivibrator_Using_Transistors_By_Mr_Vishnu_Mohan/astable.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Bjt Amplifier
+Proposar Name: Mrs Gloria
+University: Iitb
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Bjt_Amplifier_By_Mrs_Gloria/project_files/Analysis_of_frequency_response_of_the_BJT_amplifier_using_eSim.pdf b/Analysis_Of_Bjt_Amplifier_By_Mrs_Gloria/project_files/Analysis_of_frequency_response_of_the_BJT_amplifier_using_eSim.pdf
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--- /dev/null
+++ b/Analysis_Of_Full_Adder_Using_Esim_By_Mrs_Gloria/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Analysis Of Full Adder Using eSim
+Proposar Name: Mrs Gloria
+University: IITB
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Full_Adder_Using_Esim_By_Mrs_Gloria/project_files/Analysis_of_FullAdder_using_eSim.pdf b/Analysis_Of_Full_Adder_Using_Esim_By_Mrs_Gloria/project_files/Analysis_of_FullAdder_using_eSim.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Analysis Of Jkff Using eSim
+Proposar Name: Mrs Gloria
+University: IITB
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Jkff_Using_Esim_By_Mrs_Gloria/project_files/Analysis_of_JKFF_using_eSim.pdf b/Analysis_Of_Jkff_Using_Esim_By_Mrs_Gloria/project_files/Analysis_of_JKFF_using_eSim.pdf
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--- /dev/null
+++ b/Analysis_Of_Low_Pass_Filter_Using_Esim_By_Mrs_Gloria/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Analysis Of Low Pass Filter Using Esim.
+Proposar Name: Mrs Gloria
+University: Iitb
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Low_Pass_Filter_Using_Esim_By_Mrs_Gloria/project_files/Low_Pass_Filter.zip b/Analysis_Of_Low_Pass_Filter_Using_Esim_By_Mrs_Gloria/project_files/Low_Pass_Filter.zip
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--- /dev/null
+++ b/Analysis_Of_Rc_Circuit_Using_Esim_By_Mrs_Gloria/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: RC Circuit Using esim
+Proposar Name: Mrs Gloria
+University: IITB
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Rc_Circuit_Using_Esim_By_Mrs_Gloria/project_files/RC.pdf b/Analysis_Of_Rc_Circuit_Using_Esim_By_Mrs_Gloria/project_files/RC.pdf
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+++ b/Analysis_Of_Rl_Circuit_Using_Esim_By_Mrs_Gloria/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: RL Circuit Using Esim
+Proposar Name: Mrs Gloria
+University: IITB
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Analysis_Of_Rl_Circuit_Using_Esim_By_Mrs_Gloria/RL.pdf b/Analysis_Of_Rl_Circuit_Using_Esim_By_Mrs_Gloria/RL.pdf
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diff --git a/Analysis_Of_Single_-Phase_Full-_Wave_Controlled_Rectifier_(bridge_Configuration)_With_Inductive_Load._By_Ms_Mayuri_Bagnar/rect8.png b/Analysis_Of_Single_-Phase_Full-_Wave_Controlled_Rectifier_(bridge_Configuration)_With_Inductive_Load._By_Ms_Mayuri_Bagnar/rect8.png
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diff --git a/Antilog_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Gemina_Morais/README.txt b/Antilog_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Gemina_Morais/README.txt
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+++ b/Antilog_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Gemina_Morais/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Antilog Amplifier Using Op-Amp
+Proposar Name: Ms Kimberly Gemina Morais
+University: Don Bosco College Of Engineering-Goa
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Antilog_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Gemina_Morais/anti_logarthmic_amplifier.jpg b/Antilog_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Gemina_Morais/anti_logarthmic_amplifier.jpg
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+++ b/Armstrong_Oscillator_By_Ms_Harini_Sankar,_M.sri_Kumaran/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Armstrong Oscillator
+Proposar Name: Ms 1.harini Sankar 2.m.sri Kumaran.
+University: Sri Ramakrishna Engineering College
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Armstrong_Oscillator_By_Ms_Harini_Sankar,_M.sri_Kumaran/project_files/ArmstrongOscillator_SREC.pdf b/Armstrong_Oscillator_By_Ms_Harini_Sankar,_M.sri_Kumaran/project_files/ArmstrongOscillator_SREC.pdf
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diff --git a/Bandpass_Filter_Design_Using_Opamp_By_Mr_V.soundarrajan/Bandpassfilterusingopamp.jpg b/Bandpass_Filter_Design_Using_Opamp_By_Mr_V.soundarrajan/Bandpassfilterusingopamp.jpg
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Bandpass Filter Design Using Opamp
+Proposar Name: Mr V.soundarrajan
+University: K.s.rangasamy College Of Technology, Tiruchengode
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Bandpass_Filter_Design_Using_Opamp_By_Mr_V.soundarrajan/project_files/BPF.zip b/Bandpass_Filter_Design_Using_Opamp_By_Mr_V.soundarrajan/project_files/BPF.zip
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diff --git a/Battery_Charger_(5v)_Without_Transformer_By_Mr_R.k.karthik_Sridhar,_S.dayalan,_L.vignesh/BATTERY.pdf b/Battery_Charger_(5v)_Without_Transformer_By_Mr_R.k.karthik_Sridhar,_S.dayalan,_L.vignesh/BATTERY.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Battery Charger (5v) Without Transformer
+Proposar Name: Mr R.k.karthik Sridhar S.dayalan L.vignesh
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Battery_Charger_(5v)_Without_Transformer_By_Mr_R.k.karthik_Sridhar,_S.dayalan,_L.vignesh/project_files/220vACto5vDC.pdf b/Battery_Charger_(5v)_Without_Transformer_By_Mr_R.k.karthik_Sridhar,_S.dayalan,_L.vignesh/project_files/220vACto5vDC.pdf
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diff --git a/Biased_Shunt_Clippers_Using_Diodes_By_Prof_Subhashini_N/BiasedShuntClippersUsingDiodes.pdf b/Biased_Shunt_Clippers_Using_Diodes_By_Prof_Subhashini_N/BiasedShuntClippersUsingDiodes.pdf
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diff --git a/Bidirectional_Shift_Register_Using_Flip_Flops_And_Basic_Gates_By_Mr_Akshay_N._H./README.txt b/Bidirectional_Shift_Register_Using_Flip_Flops_And_Basic_Gates_By_Mr_Akshay_N._H./README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Bidirectional Shift Register Using Flip Flops And Basic Gates
+Proposar Name: Mr Akshay Nh
+University: Pes University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Bidirectional_Shift_Register_Using_Flip_Flops_And_Basic_Gates_By_Mr_Akshay_N._H./abstract.pdf b/Bidirectional_Shift_Register_Using_Flip_Flops_And_Basic_Gates_By_Mr_Akshay_N._H./abstract.pdf
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diff --git a/Bistable_Multivibrator_By_Mr_Sumanto_Kar/README.txt b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Bistable Multivibrator
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Bistable_Multivibrator_By_Mr_Sumanto_Kar/esim.jpg b/Bistable_Multivibrator_By_Mr_Sumanto_Kar/esim.jpg
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diff --git a/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/DifferentialAmplifier.jpg b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/DifferentialAmplifier.jpg
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+++ b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: BJT based Differential Amplifier
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_BJT_based_Differential_Amplifier.pdf b/Bjt_Based_Differential_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_BJT_based_Differential_Amplifier.pdf
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diff --git a/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/PPP.pdf b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/PPP.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Boot Strap Amplifier Using BJT
+Proposar Name: Ms P. Yogeshwari
+University: Dr. Mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/ABSTRACT.pdf b/Boot_Strap_Amplifier_Using_Bjt_By_Ms_P._Yogeshwari/project_files/ABSTRACT.pdf
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diff --git a/Bootstrap_Amplifier_Circuit_Using_Transistors_By_Dr_Pallavi_Khare/BootstrapAmplifier.pdf b/Bootstrap_Amplifier_Circuit_Using_Transistors_By_Dr_Pallavi_Khare/BootstrapAmplifier.pdf
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diff --git a/Carry_Look_Ahead_Adder_By_Mr_Akshay_N._H./README.txt b/Carry_Look_Ahead_Adder_By_Mr_Akshay_N._H./README.txt
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+++ b/Carry_Look_Ahead_Adder_By_Mr_Akshay_N._H./README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Carry Look Ahead Adder
+Proposar Name: Mr Akshay Nh
+University: Pes University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Carry_Look_Ahead_Adder_By_Mr_Akshay_N._H./abstract.pdf b/Carry_Look_Ahead_Adder_By_Mr_Akshay_N._H./abstract.pdf
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diff --git a/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./README.txt b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./README.txt
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+++ b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Carry Select Adder Using Bec Logic
+Proposar Name: Mr Athul M S
+University: Vit Vellore
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./carry_select_adder_using_bec_logic.pdf b/Carry_Select_Adder_Using_Bec_Logic_By_Mr_Athul_M._S./carry_select_adder_using_bec_logic.pdf
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diff --git a/Cascaded_Bipolar_Junction_Transistor_Amplifier_By_Ms_Sai_Dharini/README.txt b/Cascaded_Bipolar_Junction_Transistor_Amplifier_By_Ms_Sai_Dharini/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Cascaded Bipolar Junction Transistor Amplifier
+Proposar Name: Ms Sai Dharini
+University: Anna University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Cascaded_Bipolar_Junction_Transistor_Amplifier_By_Ms_Sai_Dharini/cascadedbjtamplieiercircuit.png b/Cascaded_Bipolar_Junction_Transistor_Amplifier_By_Ms_Sai_Dharini/cascadedbjtamplieiercircuit.png
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diff --git a/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/ClappsOscillator.pdf b/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/ClappsOscillator.pdf
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Clapps Oscillator
+Proposar Name: Ms Shubangi Mahajan
+University: Indian Institute Of Information Technology, Trichy
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappOscillator.zip b/Clapps_Oscillator_By_Ms_Shubangi_Mahajan/project_files/ClappOscillator.zip
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Class A Amplifier
+Proposar Name: Ms Karthika K
+University: K S Rangasamy College Of Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Class_A_Amplifier_By_Ms_Karthika_K./project_files/classA.zip b/Class_A_Amplifier_By_Ms_Karthika_K./project_files/classA.zip
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Class AB Amplifier
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_Class_AB_Amplifier.pdf b/Class_Ab_Amplifier_By_Mr_Sumanto_Kar/project_files/Abstract_Class_AB_Amplifier.pdf
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diff --git a/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/README.txt b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Class B Push Pull Amplifier
+Proposar Name: Mr Mohammmed Zubair Kasab
+University: Mvj College Of Engineering, Bangalore
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/maxresdefault.jpg b/Class_B_Push_Pull_Amplifier_By_Mr_Mohammmed_Zubair_Kasab/maxresdefault.jpg
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diff --git a/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/123345.png b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/123345.png
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: CMOS NAND Gate Using 0.5um Technology
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/Abstract_CMOS_NAND_Gate123.pdf b/Cmos_Nand_Gate_Using_0.5um_Technology_By_Mr_Sumanto_Kar/project_files/Abstract_CMOS_NAND_Gate123.pdf
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diff --git a/Common_Emitter_Amplifier_Using_Bc547_Transistor_By_Ms_Karthikpriya_M/CEamplifier.pdf b/Common_Emitter_Amplifier_Using_Bc547_Transistor_By_Ms_Karthikpriya_M/CEamplifier.pdf
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diff --git a/Comparator_Circuit_Using_Op-Amp_By_Ms_Kimberly_Morais/README.txt b/Comparator_Circuit_Using_Op-Amp_By_Ms_Kimberly_Morais/README.txt
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+++ b/Comparator_Circuit_Using_Op-Amp_By_Ms_Kimberly_Morais/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Comparator Circuit Using Op-Amp
+Proposar Name: Ms Kimberly Morais
+University: Goa University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Comparator_Circuit_Using_Op-Amp_By_Ms_Kimberly_Morais/comparator.jpg b/Comparator_Circuit_Using_Op-Amp_By_Ms_Kimberly_Morais/comparator.jpg
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diff --git a/Constant_K_High_Pass_Filter_By_Ms_Shubangi_Mahajan/ConstantKHighPassFilter.pdf b/Constant_K_High_Pass_Filter_By_Ms_Shubangi_Mahajan/ConstantKHighPassFilter.pdf
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Constant K High Pass Filter
+Proposar Name: Ms Shubangi Mahajan
+University: Indian Institute Of Information Technology, Trichy
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Constant_K_High_Pass_Filter_By_Ms_Shubangi_Mahajan/project_files/ConstantKHighPassFilter.pdf b/Constant_K_High_Pass_Filter_By_Ms_Shubangi_Mahajan/project_files/ConstantKHighPassFilter.pdf
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diff --git a/Current_Mirror_By_Ms_Kimberly_Gemina_Morais/CurrentMirror.png b/Current_Mirror_By_Ms_Kimberly_Gemina_Morais/CurrentMirror.png
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Current Mirror
+Proposar Name: Ms Kimberly Gemina Morais
+University: Don Bosco College Of Engineering-Goa
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Current_Mirror_By_Ms_Kimberly_Gemina_Morais/project_files/currentmirror.pdf b/Current_Mirror_By_Ms_Kimberly_Gemina_Morais/project_files/currentmirror.pdf
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diff --git a/Current_Series_Feedback_Amplifier_By_Ms_Karthika_K/README.txt b/Current_Series_Feedback_Amplifier_By_Ms_Karthika_K/README.txt
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+++ b/Current_Series_Feedback_Amplifier_By_Ms_Karthika_K/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Current_series_feedback_amplifier
+Proposar Name: Ms Karthika K
+University: K S Rangasamy College Of Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Current_Series_Feedback_Amplifier_By_Ms_Karthika_K/current_series.JPG b/Current_Series_Feedback_Amplifier_By_Ms_Karthika_K/current_series.JPG
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Current Shunt Feedback Amplifier
+Proposar Name: Mr Vishvendra Prakash Goyal
+University: Mayurakshi Institute Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Current_Shunt_Feedback_Amplifier_By_Mr_Vishvendra_Prakash_Goyal/project_files/CURRENT_SHUNT_FEEDBACK_AMPLIFIER.pdf b/Current_Shunt_Feedback_Amplifier_By_Mr_Vishvendra_Prakash_Goyal/project_files/CURRENT_SHUNT_FEEDBACK_AMPLIFIER.pdf
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diff --git a/Darlington_Pair_Amplifier_By_Mr_Donepudi_Suresh_Babu/README.txt b/Darlington_Pair_Amplifier_By_Mr_Donepudi_Suresh_Babu/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Darlington Pair Amplifier
+Proposar Name: Mr Donepudi Suresh Babu
+University: PSCMR College Of Engineering & Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Darlington_Pair_Amplifier_By_Mr_Donepudi_Suresh_Babu/darlington.pdf b/Darlington_Pair_Amplifier_By_Mr_Donepudi_Suresh_Babu/darlington.pdf
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diff --git a/Dc_Voltage_Regulator_By_Mr_S_Sethuram,_M_Sathish_Kumar,_C_Gowtham/README.txt b/Dc_Voltage_Regulator_By_Mr_S_Sethuram,_M_Sathish_Kumar,_C_Gowtham/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Dc Voltage Regulator
+Proposar Name: Mr S Sethuram , M Sathish Kumar , C Gowtham
+University: Dr.mahalingam College Of Engineering And Technology,pollachi.
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Dc_Voltage_Regulator_By_Mr_S_Sethuram,_M_Sathish_Kumar,_C_Gowtham/dcvr.pdf b/Dc_Voltage_Regulator_By_Mr_S_Sethuram,_M_Sathish_Kumar,_C_Gowtham/dcvr.pdf
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diff --git a/Decimal_To_Bcd_Encoder_By_Ms_Vadissa_Yamini/README.txt b/Decimal_To_Bcd_Encoder_By_Ms_Vadissa_Yamini/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Decimal To BCD Encoder
+Proposar Name: Ms Vadissa Yamini
+University: Indian Institute Of Information Technology Trichy
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Decimal_To_Bcd_Encoder_By_Ms_Vadissa_Yamini/decimalbcdencoder.jpg b/Decimal_To_Bcd_Encoder_By_Ms_Vadissa_Yamini/decimalbcdencoder.jpg
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diff --git a/Decoder_Design_And_Simulation_By_Mr_Jishnu_Saurav_Mittapalli/abstract.pdf b/Decoder_Design_And_Simulation_By_Mr_Jishnu_Saurav_Mittapalli/abstract.pdf
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diff --git a/Decoder_Design_And_Simulation_By_Mr_Jishnu_Saurav_Mittapalli/project_files/abstract_esim.pdf b/Decoder_Design_And_Simulation_By_Mr_Jishnu_Saurav_Mittapalli/project_files/abstract_esim.pdf
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diff --git a/Design_Of_1_Bit_Logic_Unit_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt b/Design_Of_1_Bit_Logic_Unit_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
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+++ b/Design_Of_1_Bit_Logic_Unit_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of 1 Bit Logic Unit
+Proposar Name: Mr Padigepati Mallikarjuna Reddy
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_1_Bit_Logic_Unit_By_Mr_Padigepati_Mallikarjuna_Reddy/logicref.JPG b/Design_Of_1_Bit_Logic_Unit_By_Mr_Padigepati_Mallikarjuna_Reddy/logicref.JPG
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diff --git a/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/NewaLU1.JPG b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/NewaLU1.JPG
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diff --git a/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
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+++ b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of 4 Bit ALU
+Proposar Name: Mr Padigepati Mallikarjuna Reddy
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_ALU.pdf b/Design_Of_4_Bit_Alu_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_ALU.pdf
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diff --git a/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/4bitFulladder.png b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/4bitFulladder.png
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diff --git a/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of 4 Bit Full Adder With Fast Carry
+Proposar Name: Mr Padigepati Mallikarjuna Reddy
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FA.pdf b/Design_Of_4_Bit_Full_Adder_With_Fast_Carry_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/4_bit_FA.pdf
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diff --git a/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/74153.png b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/74153.png
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+++ b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of 74153 IC
+Proposar Name: Mr Padigepati Mallikarjuna Reddy
+University: National Institute Of Technollogy Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/74153_ADual_4lineto1line_Multiplexer.pdf b/Design_Of_74153_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/74153_ADual_4lineto1line_Multiplexer.pdf
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diff --git a/Design_Of_74157_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/Quad2to1MUX.JPG b/Design_Of_74157_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/Quad2to1MUX.JPG
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diff --git a/Design_Of_74157_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt b/Design_Of_74157_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of 74157 IC
+Proposar Name: Mr Padigepati Mallikarjuna Reddy
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_74157_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/74157_AQuad_2lineto1line_Multiplexer.pdf b/Design_Of_74157_Ic_By_Mr_Padigepati_Mallikarjuna_Reddy/project_files/74157_AQuad_2lineto1line_Multiplexer.pdf
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diff --git a/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/BPSKproposal.pdf b/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/BPSKproposal.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Binary Phase Shift Keying (bpsk) Modulator & Demodulator Using eSim
+Proposar Name: Prof Raghu K
+University: Reva University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/project_files/Design_Of_BPSK_by_Raghu.zip b/Design_Of_Binary_Phase_Shift_Keying_(bpsk)_Modulator_&_Demodulator_Using_Esim_By_Prof_Raghu_K/project_files/Design_Of_BPSK_by_Raghu.zip
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diff --git a/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/README.txt b/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/README.txt
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+++ b/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Clipper Circuit Using eSim
+Proposar Name: Ms A.aarthy K.c.charumathy R.genga Devi
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/clipper.pdf b/Design_Of_Clipper_Circuit_Using_Esim_By_Ms_A.aarthy,_K.c.charumathy,_R.genga_Devi/clipper.pdf
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diff --git a/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/README.txt b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/README.txt
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+++ b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Colpitt'S Oscillator
+Proposar Name: Ms S.shubhakarani T.jeeva Rekha
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/colpitts.pdf b/Design_Of_Colpitt'S_Oscillator_By_Ms_S.shubhakarani,_T.jeeva_Rekha/colpitts.pdf
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diff --git a/Design_Of_Digital_Decoder_Counter_Using_Lm555_And_Ic4017_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt b/Design_Of_Digital_Decoder_Counter_Using_Lm555_And_Ic4017_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Digital Decoder Counter Using LM555 And IC4017 Using eSim.
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Digital_Decoder_Counter_Using_Lm555_And_Ic4017_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/circuitdiagram.png b/Design_Of_Digital_Decoder_Counter_Using_Lm555_And_Ic4017_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/circuitdiagram.png
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diff --git a/Design_Of_Dual_Timer_Ic_Circuit_Using_Lm555_In_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt b/Design_Of_Dual_Timer_Ic_Circuit_Using_Lm555_In_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Dual Timer IC Circuit Using LM555 In eSim
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Dual_Timer_Ic_Circuit_Using_Lm555_In_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/dualtimer.jpg b/Design_Of_Dual_Timer_Ic_Circuit_Using_Lm555_In_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/dualtimer.jpg
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diff --git a/Design_Of_Four_Bit_Carry_Save_Adder_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt b/Design_Of_Four_Bit_Carry_Save_Adder_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Four Bit Carry Save Adder
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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diff --git a/Design_Of_Four_Bit_Vedic_Multiplier_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt b/Design_Of_Four_Bit_Vedic_Multiplier_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Four Bit Vedic Multiplier
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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diff --git a/Design_Of_Full_Subtractor_Circuit_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt b/Design_Of_Full_Subtractor_Circuit_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Full Subtractor Circuit
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Half Subtractor Circuit
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Mod -10 Asynchronous Counter Using J-K Flip Flop.
+Proposar Name: Mrs Priya Chetan Mule
+University: R.a.i.t
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Mod_-10_Asynchronous_Counter_Using_J-K_Flip_Flop_By_Mrs_Priya_C_Mule,_Debajani_Mahanta/project_files/Abstract1MOD10Counter.pdf b/Design_Of_Mod_-10_Asynchronous_Counter_Using_J-K_Flip_Flop_By_Mrs_Priya_C_Mule,_Debajani_Mahanta/project_files/Abstract1MOD10Counter.pdf
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diff --git a/Design_Of_Schmitt_Trigger_Using_Transistors_By_Mr_Vishvendra_Prakash_Goyal/README.txt b/Design_Of_Schmitt_Trigger_Using_Transistors_By_Mr_Vishvendra_Prakash_Goyal/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Schmitt Trigger Using Transistors
+Proposar Name: Mr Vishvendra Prakash Goyal
+University: Mayurakshi Institute Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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diff --git a/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/README.txt b/Design_Of_Second_Order_Lowpass_Filter_Circuit_Using_Op-Amp_By_Mr_A.mathiyazhagan/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Second Order Lowpass Filter Circuit Using Op-Amp
+Proposar Name: Mr A.mathiyazhagan
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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diff --git a/Design_Of_Switch_Mode_Power_Supply_By_Ms_Vuppala_Venkataramya/README.txt b/Design_Of_Switch_Mode_Power_Supply_By_Ms_Vuppala_Venkataramya/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Switch Mode Power Supply
+Proposar Name: Ms Vuppala Venkataramya
+University: Gayatri Vidya Parishad College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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diff --git a/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt b/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Two Bit Carry Look Ahead Adder Using eSim
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/cla.png b/Design_Of_Two_Bit_Carry_Look_Ahead_Adder_Using_Esim_By_Mr_Katakam_V_N_Manikanta_Bhargav/cla.png
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+++ b/Design_Of_Two_Bit_Multiplier_By_Mr_Katakam_V_N_Manikanta_Bhargav/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Design Of Two Bit Multiplier
+Proposar Name: Mr Katakam V N Manikanta Bhargav
+University: National Institute Of Technology Durgapur
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Design_Of_Two_Bit_Multiplier_By_Mr_Katakam_V_N_Manikanta_Bhargav/project_files/bhargav_mul_test.zip b/Design_Of_Two_Bit_Multiplier_By_Mr_Katakam_V_N_Manikanta_Bhargav/project_files/bhargav_mul_test.zip
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diff --git a/Differential_Amplifier_Using_Op-Amp_By_Ms_K.karthika/README.txt b/Differential_Amplifier_Using_Op-Amp_By_Ms_K.karthika/README.txt
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+++ b/Differential_Amplifier_Using_Op-Amp_By_Ms_K.karthika/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Differential Amplifier Using Op-Amp
+Proposar Name: Ms K.karthika
+University: K.s.rangasamy College Of Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Differential_Amplifier_Using_Op-Amp_By_Ms_K.karthika/diffamp.png b/Differential_Amplifier_Using_Op-Amp_By_Ms_K.karthika/diffamp.png
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diff --git a/Differentiator_Using_Op-Amp_By_Mrs_Gloria/Analysis_of_Differentiator_using_eSim.pdf b/Differentiator_Using_Op-Amp_By_Mrs_Gloria/Analysis_of_Differentiator_using_eSim.pdf
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+++ b/Differentiator_Using_Op-Amp_By_Mrs_Gloria/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Differentiator
+Proposar Name: Mrs Gloria
+University: Iitb
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Differentiator_Using_Op-Amp_By_Mrs_Gloria/project_files/Analysis_of_Differentiator_using_eSim.pdf b/Differentiator_Using_Op-Amp_By_Mrs_Gloria/project_files/Analysis_of_Differentiator_using_eSim.pdf
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diff --git a/Digital_Clock_Using_7490,7447,555_Ic'S._By_Mr_Irfan_Yakub_Ali_Mohd/pic.jpg b/Digital_Clock_Using_7490,7447,555_Ic'S._By_Mr_Irfan_Yakub_Ali_Mohd/pic.jpg
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diff --git a/Double_Tail_Comparator_By_Mr_Athul_M._S./Double_Tail_Comparator.pdf b/Double_Tail_Comparator_By_Mr_Athul_M._S./Double_Tail_Comparator.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Double Tail Comparator
+Proposar Name: Mr Athul M S
+University: V I T Vellore
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Double_Tail_Comparator_By_Mr_Athul_M._S./project_files/Double_Tail_Comparator.pdf b/Double_Tail_Comparator_By_Mr_Athul_M._S./project_files/Double_Tail_Comparator.pdf
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+++ b/Dual_Polarity_Power_Supply_By_Ms_Deepa_Dilip_Divate/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Dual Polarity Power Supply
+Proposar Name: Ms Deepa Dilip Divate
+University: Sanjay Ghodawat Polytechnic, Atigre.
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Dual_Polarity_Power_Supply_By_Ms_Deepa_Dilip_Divate/project_files/Dual_Polarity_Power_Supply.zip b/Dual_Polarity_Power_Supply_By_Ms_Deepa_Dilip_Divate/project_files/Dual_Polarity_Power_Supply.zip
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Full Wave Bridge Rectifier
+Proposar Name: Mrs Gloria
+University: Iitb
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Full_Wave_Bridge_Rectifier_By_Mrs_Gloria/project_files/Analysis_of_Fullwave_Bridge_rectifier_using_eSim.pdf b/Full_Wave_Bridge_Rectifier_By_Mrs_Gloria/project_files/Analysis_of_Fullwave_Bridge_rectifier_using_eSim.pdf
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Full Wave Rectifier With Capacitor Filter
+Proposar Name: Ms Shubangi Mahajan
+University: Indian Institute Of Information Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FWRusingCF.zip b/Full_Wave_Rectifier_With_Capacitor_Filter_By_Ms_Shubangi_Mahajan/project_files/FWRusingCF.zip
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diff --git a/Function_Generator_Using_Ne566_By_Mr_Mohd_Irfan_Yakub_Ali/README.txt b/Function_Generator_Using_Ne566_By_Mr_Mohd_Irfan_Yakub_Ali/README.txt
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--- /dev/null
+++ b/Function_Generator_Using_Ne566_By_Mr_Mohd_Irfan_Yakub_Ali/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Function Generator Using NE566.
+Proposar Name: Mr Mohd Irfan Yakub Ali
+University: Kakatiya Institute Of Technology And Science,warangal
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Function_Generator_Using_Ne566_By_Mr_Mohd_Irfan_Yakub_Ali/function_generator_using_NE566_abstract.pdf b/Function_Generator_Using_Ne566_By_Mr_Mohd_Irfan_Yakub_Ali/function_generator_using_NE566_abstract.pdf
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diff --git a/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/HARTLEYOSCILLATOR.pdf b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/HARTLEYOSCILLATOR.pdf
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--- /dev/null
+++ b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Hartley Oscillator
+Proposar Name: Ms N.akshaya S.malarvizhi A.ashina
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATOR.zip b/Hartley_Oscillator_By_Ms_N.akshaya,_S.malarvizhi,_A.ashina/project_files/HARTELYOSCILLATOR.zip
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diff --git a/High_Pass_Filter_Design_Using_Op-Amp_By_Mr_V.soundarrajan,_S.gokul,_M.govindharajan/README.txt b/High_Pass_Filter_Design_Using_Op-Amp_By_Mr_V.soundarrajan,_S.gokul,_M.govindharajan/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Highpass Filter Design Using Op-Amp
+Proposar Name: Mr V.soundarrajan, S.gokul, G.govindhraj.
+University: K.s.rangasamy College Of Technology, Tiruchengode
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/High_Pass_Filter_Design_Using_Op-Amp_By_Mr_V.soundarrajan,_S.gokul,_M.govindharajan/project_files/HPFusingOpAmp.pdf b/High_Pass_Filter_Design_Using_Op-Amp_By_Mr_V.soundarrajan,_S.gokul,_M.govindharajan/project_files/HPFusingOpAmp.pdf
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diff --git a/High_Pass_Filter_Using_Esim_By_Mrs_Gloria/High_pass_filter_using_eSim.pdf b/High_Pass_Filter_Using_Esim_By_Mrs_Gloria/High_pass_filter_using_eSim.pdf
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--- /dev/null
+++ b/High_Pass_Filter_Using_Esim_By_Mrs_Gloria/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: High Pass Filter Using eSim
+Proposar Name: Mrs Gloria
+University: IITB
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/High_Pass_Filter_Using_Esim_By_Mrs_Gloria/project_files/High_Pass_Filter.zip b/High_Pass_Filter_Using_Esim_By_Mrs_Gloria/project_files/High_Pass_Filter.zip
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diff --git a/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/README.txt b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/README.txt
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--- /dev/null
+++ b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Highly Efficient Switching Mode Power Supply Using LM2596
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/lm2596.pdf b/Highly_Efficient_Switching_Mode_Power_Supply_Using_Lm2596_By_Mr_Sumanto_Kar/lm2596.pdf
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diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/555testingcircuit.jpg b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/555testingcircuit.jpg
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diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/README.txt b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/README.txt
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--- /dev/null
+++ b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: IC 555 Testing Circuit
+Proposar Name: Mr Shekhar Maruti Nandanwar
+University: Kc College Of Engineering And Management Studies And Research
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_TESTING_CIRCUIT.zip b/Ic_555_Testing_Circuit_By_Mr_Shekhar_Maruti_Nandanwar/project_files/IC555_TESTING_CIRCUIT.zip
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diff --git a/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/123345.jpg b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/123345.jpg
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--- /dev/null
+++ b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: IC LM317 Design And Implementation
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/project_files/Abstract_IC_LM317_Design_And_Implementation.pdf b/Ic_Lm317_Design_And_Implementation_By_Mr_Sumanto_Kar/project_files/Abstract_IC_LM317_Design_And_Implementation.pdf
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diff --git a/Implementation_Of_Bistable_Multivibrator_Using_Transistors_By_Mr_Sharath_N_Chittaragi/Bistable_MV_Cir_Diagram.pdf b/Implementation_Of_Bistable_Multivibrator_Using_Transistors_By_Mr_Sharath_N_Chittaragi/Bistable_MV_Cir_Diagram.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Implementation Of Bistable Multivibrator Using Transistors
+Proposar Name: Mr Sharath N Chittaragi
+University: SSN College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Implementation_Of_Bistable_Multivibrator_Using_Transistors_By_Mr_Sharath_N_Chittaragi/project_files/Implementation_of_Bistable_Multivibrator_using_Transistors.pdf b/Implementation_Of_Bistable_Multivibrator_Using_Transistors_By_Mr_Sharath_N_Chittaragi/project_files/Implementation_of_Bistable_Multivibrator_using_Transistors.pdf
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diff --git a/Implementation_Of_Boolean_Function_Using_4:1_Multiplexer_By_Mr_Abinash_Kumar_Bharati/mux.png b/Implementation_Of_Boolean_Function_Using_4:1_Multiplexer_By_Mr_Abinash_Kumar_Bharati/mux.png
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diff --git a/Implementation_Of_Odd_Stage_Ring_Oscillator_Using_0.5um_Cmos_Process_By_Mr_Sharath_N_Chittaragi/README.txt b/Implementation_Of_Odd_Stage_Ring_Oscillator_Using_0.5um_Cmos_Process_By_Mr_Sharath_N_Chittaragi/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Implementation Of Odd Stage Ring Oscillator Using 0.5um CMOS Process
+Proposar Name: Mr Sharath N Chittaragi
+University: SSN College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Implementation_Of_Odd_Stage_Ring_Oscillator_Using_0.5um_Cmos_Process_By_Mr_Sharath_N_Chittaragi/Ring_osc_5.png b/Implementation_Of_Odd_Stage_Ring_Oscillator_Using_0.5um_Cmos_Process_By_Mr_Sharath_N_Chittaragi/Ring_osc_5.png
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diff --git a/Instrumentation_Amplifier_By_Mr_Pranav_M/INSTRUMENTATION_AMPLIFIER.pdf b/Instrumentation_Amplifier_By_Mr_Pranav_M/INSTRUMENTATION_AMPLIFIER.pdf
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index 0000000..cdf70a6
--- /dev/null
+++ b/Instrumentation_Amplifier_By_Mr_Pranav_M/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Instrumentation Amplifier
+Proposar Name: Mr Pranav M
+University: Bms College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/Instrumentation_Amplifier.pdf b/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/Instrumentation_Amplifier.pdf
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+++ b/Instrumentation_Amplifier_By_Mr_Pranav_M/project_files/instrumentation_amp.zip
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diff --git a/Integrator_Using_Opamp_In_Esim_By_Mrs_Gloria/Integrator_using_opamp_eSim.pdf b/Integrator_Using_Opamp_In_Esim_By_Mrs_Gloria/Integrator_using_opamp_eSim.pdf
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Integrator Using Opamp In Esim
+Proposar Name: Mrs Gloria
+University: Iitb
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Integrator_Using_Opamp_In_Esim_By_Mrs_Gloria/project_files/Integrator.zip b/Integrator_Using_Opamp_In_Esim_By_Mrs_Gloria/project_files/Integrator.zip
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diff --git a/Johnson_Ring_Counter_By_Mr_Lohit_P/README.txt b/Johnson_Ring_Counter_By_Mr_Lohit_P/README.txt
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+++ b/Johnson_Ring_Counter_By_Mr_Lohit_P/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Johnson Ring Counter
+Proposar Name: Mr Lohit P
+University: Reva University, Bangalore
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Johnson_Ring_Counter_By_Mr_Lohit_P/johnson_counter.pdf b/Johnson_Ring_Counter_By_Mr_Lohit_P/johnson_counter.pdf
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diff --git a/Logarithmic_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Morais/README.txt b/Logarithmic_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Morais/README.txt
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+++ b/Logarithmic_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Morais/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Logarithmic Amplifier Using Op-Amp
+Proposar Name: Ms Kimberly Morais
+University: Don Bosco College Of Engineering, Goa
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Logarithmic_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Morais/logarthmic_amplifier.jpg b/Logarithmic_Amplifier_Using_Op-Amp_By_Ms_Kimberly_Morais/logarthmic_amplifier.jpg
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Monostable Multivibrator Using BJTs
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Abstract_Monostable_Multivibrator_Using_BJTs.pdf b/Monostable_Multivibrator_Using_Bjts_By_Mr_Sumanto_Kar/project_files/Abstract_Monostable_Multivibrator_Using_BJTs.pdf
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diff --git a/Monostable_Multivibrator_Using_Op-Amp_By_Ms_Shefali_Kumari/README.txt b/Monostable_Multivibrator_Using_Op-Amp_By_Ms_Shefali_Kumari/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Monostable Multivibrator Using Op-Amp
+Proposar Name: Ms Shefali Kumari
+University: Dayananda Sagar College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Monostable_Multivibrator_Using_Op-Amp_By_Ms_Shefali_Kumari/monostable.png b/Monostable_Multivibrator_Using_Op-Amp_By_Ms_Shefali_Kumari/monostable.png
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Negative Peak Shunt Clipper
+Proposar Name: Prof Anilkumar V
+University: Reva University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Negative_Peak_Shunt_Clipper_By_Prof_Anilkumar_V/project_files/Anil_Clipper.zip b/Negative_Peak_Shunt_Clipper_By_Prof_Anilkumar_V/project_files/Anil_Clipper.zip
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Non-Inverting Amplifier
+Proposar Name: Mr Sebin Sunny P
+University: Sreepathy Institute Of Management And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Non-Inverting_Amplifier_By_Mr_Sebin_Sunny_P/project_files/NonInvertingAmplifier.zip b/Non-Inverting_Amplifier_By_Mr_Sebin_Sunny_P/project_files/NonInvertingAmplifier.zip
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diff --git a/Notch_Filter_By_Mr_Abhilash_Karankote/README.txt b/Notch_Filter_By_Mr_Abhilash_Karankote/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Notch Filter
+Proposar Name: Mr Abhilash K
+University: The National Institute Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Notch_Filter_By_Mr_Abhilash_Karankote/_20171030_234907.jpg b/Notch_Filter_By_Mr_Abhilash_Karankote/_20171030_234907.jpg
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+++ b/Opamp_741_Tester_By_Mr_Shekhar_Maruti_Nandanwar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Opamp 741 Tester
+Proposar Name: Mr Shekhar Maruti Nandanwar
+University: KC College Of Engineering And Management Studies And Research
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Opamp_741_Tester_By_Mr_Shekhar_Maruti_Nandanwar/project_files/opamp_741_tester.pdf b/Opamp_741_Tester_By_Mr_Shekhar_Maruti_Nandanwar/project_files/opamp_741_tester.pdf
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diff --git a/Peltz_Oscillator_By_Ms_Krithika.n,_Vishnu_Priyaa.v/README.txt b/Peltz_Oscillator_By_Ms_Krithika.n,_Vishnu_Priyaa.v/README.txt
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+++ b/Peltz_Oscillator_By_Ms_Krithika.n,_Vishnu_Priyaa.v/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Peltz Oscillator
+Proposar Name: Ms Krithika.n Vishnu Priyaa.v
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Peltz_Oscillator_By_Ms_Krithika.n,_Vishnu_Priyaa.v/elec.pdf b/Peltz_Oscillator_By_Ms_Krithika.n,_Vishnu_Priyaa.v/elec.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Practical Cascode Amplifier
+Proposar Name: Mr 1. Sai Prasad.n 2. Thamil Selvan P.s
+University: Sri Ramakrishna Engineering College
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.pdf b/Practical_Cascode_Amplifier_By_Mr_Sai_Prasad.n,_Thamil_Selvan_P.s/project_files/PRACTICALCASCODEAMPLIFIER.pdf
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diff --git a/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./README.txt b/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Preemphasis And Deemphasis Using Ic 741 Op Amp
+Proposar Name: Mr Akshay Nh
+University: Pes University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./abstract.pdf b/Pre-Emphasis_And_De-Emphasis_Using_Ic_741_Op-Amp_By_Mr_Akshay_N._H./abstract.pdf
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diff --git a/Precision_Plus_minus_Clipping_Circuit_By_Mr_Raghava_M_V,_Abhilash_Karankote/README.txt b/Precision_Plus_minus_Clipping_Circuit_By_Mr_Raghava_M_V,_Abhilash_Karankote/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Precision Plus/minus Clipping Circuit
+Proposar Name: Mr Raghava M V, Abhilash K
+University: The National Institute Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Precision_Plus_minus_Clipping_Circuit_By_Mr_Raghava_M_V,_Abhilash_Karankote/precisionclipper.pdf b/Precision_Plus_minus_Clipping_Circuit_By_Mr_Raghava_M_V,_Abhilash_Karankote/precisionclipper.pdf
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diff --git a/Pwm_Modulator_Using_555_Timer_Ic_By_Ms_Vadisa_Yamini/README.txt b/Pwm_Modulator_Using_555_Timer_Ic_By_Ms_Vadisa_Yamini/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: PWM Modulator Using 555 Timer IC
+Proposar Name: Ms Vadisa Yamini
+University: Indian Institute Of Information Technology Trichy
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Pwm_Modulator_Using_555_Timer_Ic_By_Ms_Vadisa_Yamini/project_files/Abstract_eSimA_PWM_modulator.pdf b/Pwm_Modulator_Using_555_Timer_Ic_By_Ms_Vadisa_Yamini/project_files/Abstract_eSimA_PWM_modulator.pdf
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diff --git a/R-2r_Ladder_Dac_Using_Esim_By_Prof_Hemavathi_N_V/README.txt b/R-2r_Ladder_Dac_Using_Esim_By_Prof_Hemavathi_N_V/README.txt
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+++ b/R-2r_Ladder_Dac_Using_Esim_By_Prof_Hemavathi_N_V/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: R-2R Ladder DAC using eSim
+Proposar Name: Mrs Hemavathi N V
+University: East Point College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/R-2r_Ladder_Dac_Using_Esim_By_Prof_Hemavathi_N_V/project_files/DAC.pdf b/R-2r_Ladder_Dac_Using_Esim_By_Prof_Hemavathi_N_V/project_files/DAC.pdf
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diff --git a/Rc_Chaotic_Oscillator_By_Mr_Gollamudi_Sai_Srikar/chaoticoscillator.jpg b/Rc_Chaotic_Oscillator_By_Mr_Gollamudi_Sai_Srikar/chaoticoscillator.jpg
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diff --git a/Rc_Phase_Shift_Oscillator_By_Ms_Rohini.n,_Parkavi.k/README.txt b/Rc_Phase_Shift_Oscillator_By_Ms_Rohini.n,_Parkavi.k/README.txt
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+++ b/Rc_Phase_Shift_Oscillator_By_Ms_Rohini.n,_Parkavi.k/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Rc Phase Shift Oscillator
+Proposar Name: Ms Rohini.n Parkavi.k
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Rc_Phase_Shift_Oscillator_By_Ms_Rohini.n,_Parkavi.k/project_files/parkavi.pdf b/Rc_Phase_Shift_Oscillator_By_Ms_Rohini.n,_Parkavi.k/project_files/parkavi.pdf
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diff --git a/Resonance_Of_Series_And_Parallel_Rlc_Circuit_By_Mr_Madhu_Kiran_Buddi/README.txt b/Resonance_Of_Series_And_Parallel_Rlc_Circuit_By_Mr_Madhu_Kiran_Buddi/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Resonance of Series and Parallel RLC Circuit
+Proposar Name: Mr Madhu Kiran Buddi
+University: Pscmr College Of Engg. &tech.
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Resonance_Of_Series_And_Parallel_Rlc_Circuit_By_Mr_Madhu_Kiran_Buddi/project_files/RESONANCE_OF_SERIES_AND_PARALLEL_RLC_CIRCUIT.pdf b/Resonance_Of_Series_And_Parallel_Rlc_Circuit_By_Mr_Madhu_Kiran_Buddi/project_files/RESONANCE_OF_SERIES_AND_PARALLEL_RLC_CIRCUIT.pdf
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diff --git a/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt b/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: RTL Inverter Gate Design And Simulation
+Proposar Name: Mr Atin Mukherjee
+University: Dr. B. C. Roy Polytechnic
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate.zip b/Rtl_Inverter_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/project_files/RTL_Inverter_Gate.zip
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diff --git a/Rtl_Nand_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt b/Rtl_Nand_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt
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+++ b/Rtl_Nand_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: RTL Nand Gate Design And Simulation
+Proposar Name: Mr Atin Mukherjee
+University: Dr. B.C.Roy Polytechnic
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Rtl_Nand_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/nand.jpg b/Rtl_Nand_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/nand.jpg
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diff --git a/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt b/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/README.txt
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--- /dev/null
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: RTL NOR Gate Design And Simulation
+Proposar Name: Mr Atin Mukherjee
+University: Dr. B.C.Roy Polytechnic
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/RTL_NOR.png b/Rtl_Nor_Gate_Design_And_Simulation_By_Mr_Atin_Mukherjee/RTL_NOR.png
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diff --git a/Sawtooth_Wave_Generator_By_Mr_Shekhar_Maruti_Nandanwar/README.txt b/Sawtooth_Wave_Generator_By_Mr_Shekhar_Maruti_Nandanwar/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Sawtooth Wave Generator
+Proposar Name: Mr Shekhar Maruti Nandanwar
+University: KC College Of Engineering And Management Studies And Research
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Sawtooth_Wave_Generator_By_Mr_Shekhar_Maruti_Nandanwar/project_files/sawtooth_wave_generator.zip b/Sawtooth_Wave_Generator_By_Mr_Shekhar_Maruti_Nandanwar/project_files/sawtooth_wave_generator.zip
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diff --git a/Series_Regulator_Using_Zener_Diode_As_Control_Element_By_Ms_Sai_Dharini/README.txt b/Series_Regulator_Using_Zener_Diode_As_Control_Element_By_Ms_Sai_Dharini/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Series Regulator Using Zener Diode As Control Element
+Proposar Name: Ms Sai Dharini
+University: Anna University
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Series_Regulator_Using_Zener_Diode_As_Control_Element_By_Ms_Sai_Dharini/project_files/Series_RegulatorusingZener_diodeascontrolelement_5.pdf b/Series_Regulator_Using_Zener_Diode_As_Control_Element_By_Ms_Sai_Dharini/project_files/Series_RegulatorusingZener_diodeascontrolelement_5.pdf
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diff --git a/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/README.txt b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Simple Long Duration Timer Circuit
+Proposar Name: Ms R. Nivitaa
+University: Dr. Mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/long.pdf b/Simple_Long_Duration_Timer_Circuit_By_Ms_R._Nivitaa/long.pdf
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diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/ESIM.pdf b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/ESIM.pdf
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diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/README.txt b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/README.txt
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--- /dev/null
+++ b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Simple White Noise Generator
+Proposar Name: Mr A.S. Arunprassath
+University: Dr Mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/Abstract.pdf b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/Abstract.pdf
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diff --git a/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/noise.zip b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/noise.zip
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index 0000000..7477ee3
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+++ b/Simple_White_Noise_Generator_By_Mr_A.s._Arunprassath/project_files/noise.zip
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diff --git a/Single_Stage_Common_Source_Mosfet_Amplifier_By_Mrs_Vaishali_Umesh_Gongane/CSamplifier.jpg b/Single_Stage_Common_Source_Mosfet_Amplifier_By_Mrs_Vaishali_Umesh_Gongane/CSamplifier.jpg
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diff --git a/Single_Tuned_Rf_Amplifier_By_Mr_Donepudi_Suresh_Babu/README.txt b/Single_Tuned_Rf_Amplifier_By_Mr_Donepudi_Suresh_Babu/README.txt
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--- /dev/null
+++ b/Single_Tuned_Rf_Amplifier_By_Mr_Donepudi_Suresh_Babu/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Single Tuned Rf Amplifier
+Proposar Name: Mr Donepudi Suresh Babu
+University: Pscmr Collge Of Engg
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Single_Tuned_Rf_Amplifier_By_Mr_Donepudi_Suresh_Babu/project_files/single_tune_Amplifier.pdf b/Single_Tuned_Rf_Amplifier_By_Mr_Donepudi_Suresh_Babu/project_files/single_tune_Amplifier.pdf
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diff --git a/Super_Light_Sensitive_Intruder_Alarm_Circuit_By_Ms_Aditi_Gupta/INTRUDERALARAM.pdf b/Super_Light_Sensitive_Intruder_Alarm_Circuit_By_Ms_Aditi_Gupta/INTRUDERALARAM.pdf
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diff --git a/Synchronous_Decade_Counter_By_Mr_Piyush_Ahuja/README.txt b/Synchronous_Decade_Counter_By_Mr_Piyush_Ahuja/README.txt
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index 0000000..fe2e27d
--- /dev/null
+++ b/Synchronous_Decade_Counter_By_Mr_Piyush_Ahuja/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Synchronous Decade Counter
+Proposar Name: Mr Piyush Ahuja
+University: NIT Kurukshetra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Synchronous_Decade_Counter_By_Mr_Piyush_Ahuja/count06.jpg b/Synchronous_Decade_Counter_By_Mr_Piyush_Ahuja/count06.jpg
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diff --git a/Three_Level_Comparator_By_Mr_Sumanto_Kar/README.txt b/Three_Level_Comparator_By_Mr_Sumanto_Kar/README.txt
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+++ b/Three_Level_Comparator_By_Mr_Sumanto_Kar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Three Level Comparator
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Three_Level_Comparator_By_Mr_Sumanto_Kar/comparator.png b/Three_Level_Comparator_By_Mr_Sumanto_Kar/comparator.png
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diff --git a/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/README.txt b/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/README.txt
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--- /dev/null
+++ b/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Triangular Wave Generator Using 555 Timer
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering, Bandra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/esim.jpg b/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/esim.jpg
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diff --git a/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/project_files/Triangular_Waveform_Generator.zip b/Triangular_Wave_Generator_Using_555_Timer_By_Mr_Sumanto_Kar/project_files/Triangular_Waveform_Generator.zip
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diff --git a/Triangular_Wave_Generator_Using_Op-Amp_By_Prof_Sebin_Sunny_P/README.txt b/Triangular_Wave_Generator_Using_Op-Amp_By_Prof_Sebin_Sunny_P/README.txt
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--- /dev/null
+++ b/Triangular_Wave_Generator_Using_Op-Amp_By_Prof_Sebin_Sunny_P/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Triangular Wave Generator Using Op-Amp
+Proposar Name: Prof Sebin Sunny P
+University: Sreepathy Institute Of Management And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Triangular_Wave_Generator_Using_Op-Amp_By_Prof_Sebin_Sunny_P/Triangular_wave_generator.pdf b/Triangular_Wave_Generator_Using_Op-Amp_By_Prof_Sebin_Sunny_P/Triangular_wave_generator.pdf
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diff --git a/Two_Stage_Rc_Coupled_Amplifier_By_Ms_S.manju_Priya,_S.sowmiya/README.txt b/Two_Stage_Rc_Coupled_Amplifier_By_Ms_S.manju_Priya,_S.sowmiya/README.txt
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+++ b/Two_Stage_Rc_Coupled_Amplifier_By_Ms_S.manju_Priya,_S.sowmiya/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Two Stage Rc Coupled Amplifier
+Proposar Name: Ms S.manju Priya S.sowmiya
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Two_Stage_Rc_Coupled_Amplifier_By_Ms_S.manju_Priya,_S.sowmiya/amp.pdf b/Two_Stage_Rc_Coupled_Amplifier_By_Ms_S.manju_Priya,_S.sowmiya/amp.pdf
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diff --git a/Ujt_Relaxation_Oscillator_By_Prof_Deepa_Dilip_Divate/README.txt b/Ujt_Relaxation_Oscillator_By_Prof_Deepa_Dilip_Divate/README.txt
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--- /dev/null
+++ b/Ujt_Relaxation_Oscillator_By_Prof_Deepa_Dilip_Divate/README.txt
@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: UJT Relaxation Oscillator
+Proposar Name: Prof Deepa Dilip Divate
+University: Sanjay Ghodawat Polytechnic, Atigre
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Ujt_Relaxation_Oscillator_By_Prof_Deepa_Dilip_Divate/UJT.pdf b/Ujt_Relaxation_Oscillator_By_Prof_Deepa_Dilip_Divate/UJT.pdf
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diff --git a/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/L7812.pdf b/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/L7812.pdf
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Variable Power Supply Using IC 78xx
+Proposar Name: Mr Sumanto Kar
+University: Fr. Conceicao Rodrigues College Of Engineering
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.pdf b/Variable_Power_Supply_Using_Ic_78xx_By_Mr_Sumanto_Kar/project_files/Variable_Power_Supply.pdf
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diff --git a/Voltage_Doubler_And_Voltage_Tripler_Circuit_Using_Diode_By_Mr_Piyush_Ahuja/README.txt b/Voltage_Doubler_And_Voltage_Tripler_Circuit_Using_Diode_By_Mr_Piyush_Ahuja/README.txt
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@@ -0,0 +1,8 @@
+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Voltage Doubler and Voltage Tripler Circuit using Diode
+Proposar Name: Mr Piyush Ahuja
+University: NIT Kurukshetra
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Voltage_Doubler_And_Voltage_Tripler_Circuit_Using_Diode_By_Mr_Piyush_Ahuja/project_files/ABSTRAC1min.pdf b/Voltage_Doubler_And_Voltage_Tripler_Circuit_Using_Diode_By_Mr_Piyush_Ahuja/project_files/ABSTRAC1min.pdf
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Voltage Doubler Using IC555
+Proposar Name: Mr Shekhar Nandanwar
+University: Kc College Of Engineering And Management Studies And Research
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Voltage_Doubler_Using_Ic555_By_Mr_Shekhar_Nandanwar/VOLTAGE_Doubler_.png b/Voltage_Doubler_Using_Ic555_By_Mr_Shekhar_Nandanwar/VOLTAGE_Doubler_.png
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Voltage Series Feedback Amplifier
+Proposar Name: Mr Donepudi Suresh Babu
+University: Pscmr College Of Engineering,
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
diff --git a/Voltage_Series_Feedback_Amplifier_By_Mr_Donepudi_Suresh_Babu/project_files/voltage_series_fb.pdf b/Voltage_Series_Feedback_Amplifier_By_Mr_Donepudi_Suresh_Babu/project_files/voltage_series_fb.pdf
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diff --git a/Voltage_Shunt_Feedback_Amplifier_By_Ms_Shubangi_Mahajan/README.txt b/Voltage_Shunt_Feedback_Amplifier_By_Ms_Shubangi_Mahajan/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Voltage Shunt Feedback Amplifier
+Proposar Name: Ms Shubangi Mahajan
+University: Indian Institute Of Information Technology, Trichy
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: Weinbridge Oscillator
+Proposar Name: Ms R.sowmya S.niheetha B.madhumitha
+University: Dr.mahalingam College Of Engineering And Technology
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
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