diff options
Diffstat (limited to 'digital ciruits/FA')
-rw-r--r-- | digital ciruits/FA/FA-cache.lib | 120 | ||||
-rw-r--r-- | digital ciruits/FA/FA-rescue.dcm | 3 | ||||
-rw-r--r-- | digital ciruits/FA/FA-rescue.lib | 59 | ||||
-rw-r--r-- | digital ciruits/FA/FA.bak | 423 | ||||
-rw-r--r-- | digital ciruits/FA/FA.cir | 15 | ||||
-rw-r--r-- | digital ciruits/FA/FA.kicad_pcb | 1 | ||||
-rw-r--r-- | digital ciruits/FA/FA.pro | 33 | ||||
-rw-r--r-- | digital ciruits/FA/FA.sch | 425 | ||||
-rw-r--r-- | digital ciruits/FA/sym-lib-table | 6 |
9 files changed, 1085 insertions, 0 deletions
diff --git a/digital ciruits/FA/FA-cache.lib b/digital ciruits/FA/FA-cache.lib new file mode 100644 index 0000000..05de0b4 --- /dev/null +++ b/digital ciruits/FA/FA-cache.lib @@ -0,0 +1,120 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Device:R +# +DEF Device:R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "Device:R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# FA-rescue:OR-or_sub +# +DEF FA-rescue:OR-or_sub X 0 40 Y Y 1 F N +F0 "X" -50 50 39 H V C CNN +F1 "FA-rescue:OR-or_sub" -50 0 39 H V C CNN +F2 "" -50 0 50 H I C CNN +F3 "" -50 0 50 H I C CNN +DRAW +S -200 200 100 -150 0 1 0 N +X A 1 -400 100 200 R 50 28 1 1 I +X B 2 -400 -100 200 R 50 28 1 1 I +X Out 3 300 -50 200 L 50 28 1 1 O +X VDD 4 300 100 200 L 50 28 1 1 I +ENDDRAW +ENDDEF +# +# FA-rescue:XOR-xor_sub +# +DEF FA-rescue:XOR-xor_sub X 0 40 Y Y 1 F N +F0 "X" 0 50 39 H V C CNN +F1 "FA-rescue:XOR-xor_sub" 0 0 39 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +S -150 -150 150 -150 0 1 0 N +S -150 200 -150 -150 0 1 0 N +S 150 200 -150 200 0 1 0 N +S 150 200 150 -150 0 1 0 N +X A 1 -350 100 200 R 50 28 1 1 I +X B 2 -350 -100 200 R 50 28 1 1 I +X Out 3 350 -50 200 L 50 28 1 1 O +X VDD 4 350 100 200 L 50 28 1 1 I +ENDDRAW +ENDDEF +# +# FA-rescue:and-and_sub +# +DEF FA-rescue:and-and_sub X 0 40 Y Y 1 F N +F0 "X" -100 0 50 H V C CNN +F1 "FA-rescue:and-and_sub" -100 -50 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A -53 -46 203 749 -11 0 1 0 N 0 150 150 -50 +A -25 -25 177 -81 -819 0 1 0 N 150 -50 0 -200 +S -150 150 -150 -200 0 1 0 N +S -150 150 0 150 0 1 0 N +S 0 -200 -150 -200 0 1 0 N +X A 1 -250 50 100 R 50 50 1 1 I +X B 2 -250 -150 100 R 50 50 1 1 I +X Out 3 250 -50 100 L 50 50 1 1 O +X VDD 4 0 250 100 D 50 39 1 1 I +ENDDRAW +ENDDEF +# +# power:GND +# +DEF power:GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power:GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# power:VDD +# +DEF power:VDD #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "power:VDD" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 75 25 0 1 0 N +P 2 0 1 0 0 0 0 50 N +X VDD 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# pspice:VSOURCE +# +DEF pspice:VSOURCE V 0 40 Y Y 1 F N +F0 "V" -250 300 50 H V C CNN +F1 "pspice:VSOURCE" 0 0 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 0 200 0 1 0 N +T 0 -320 -10 50 0 0 1 V Normal 0 C C +P 2 0 1 0 -250 -250 -250 150 F +P 3 0 1 0 -300 150 -250 250 -200 150 F +X E1 1 0 300 100 D 50 50 1 1 I +X E2 2 0 -300 100 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/digital ciruits/FA/FA-rescue.dcm b/digital ciruits/FA/FA-rescue.dcm new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/digital ciruits/FA/FA-rescue.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/digital ciruits/FA/FA-rescue.lib b/digital ciruits/FA/FA-rescue.lib new file mode 100644 index 0000000..09bda33 --- /dev/null +++ b/digital ciruits/FA/FA-rescue.lib @@ -0,0 +1,59 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# OR-or_sub +# +DEF OR-or_sub X 0 40 Y Y 1 F N +F0 "X" -50 50 39 H V C CNN +F1 "OR-or_sub" -50 0 39 H V C CNN +F2 "" -50 0 50 H I C CNN +F3 "" -50 0 50 H I C CNN +DRAW +S -200 200 100 -150 0 1 0 N +X A 1 -400 100 200 R 50 28 1 1 I +X B 2 -400 -100 200 R 50 28 1 1 I +X Out 3 300 -50 200 L 50 28 1 1 O +X VDD 4 300 100 200 L 50 28 1 1 I +ENDDRAW +ENDDEF +# +# XOR-xor_sub +# +DEF XOR-xor_sub X 0 40 Y Y 1 F N +F0 "X" 0 50 39 H V C CNN +F1 "XOR-xor_sub" 0 0 39 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +S -150 -150 150 -150 0 1 0 N +S -150 200 -150 -150 0 1 0 N +S 150 200 -150 200 0 1 0 N +S 150 200 150 -150 0 1 0 N +X A 1 -350 100 200 R 50 28 1 1 I +X B 2 -350 -100 200 R 50 28 1 1 I +X Out 3 350 -50 200 L 50 28 1 1 O +X VDD 4 350 100 200 L 50 28 1 1 I +ENDDRAW +ENDDEF +# +# and-and_sub +# +DEF and-and_sub X 0 40 Y Y 1 F N +F0 "X" -100 0 50 H V C CNN +F1 "and-and_sub" -100 -50 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +A -53 -46 203 749 -11 0 1 0 N 0 150 150 -50 +A -25 -25 177 -81 -819 0 1 0 N 150 -50 0 -200 +S -150 150 -150 -200 0 1 0 N +S -150 150 0 150 0 1 0 N +S 0 -200 -150 -200 0 1 0 N +X A 1 -250 50 100 R 50 50 1 1 I +X B 2 -250 -150 100 R 50 50 1 1 I +X Out 3 250 -50 100 L 50 50 1 1 O +X VDD 4 0 250 100 D 50 39 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/digital ciruits/FA/FA.bak b/digital ciruits/FA/FA.bak new file mode 100644 index 0000000..2ea70e7 --- /dev/null +++ b/digital ciruits/FA/FA.bak @@ -0,0 +1,423 @@ +EESchema Schematic File Version 4
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diff --git a/digital ciruits/FA/FA.cir b/digital ciruits/FA/FA.cir new file mode 100644 index 0000000..76afcd6 --- /dev/null +++ b/digital ciruits/FA/FA.cir @@ -0,0 +1,15 @@ +.title KiCad schematic +.include "C:\Users\Mind\Downloads\Kicad\new_file\libs\spice_models.lib" +V1 a GND dc 0 +R2 GND carry 10meg +R1 GND sum 10meg +X5 Net-_X3-Pad3_ Net-_X4-Pad3_ carry VDD OR +X1 a b Net-_X1-Pad3_ VDD XOR +X2 Net-_X1-Pad3_ c sum VDD XOR +X3 c Net-_X1-Pad3_ Net-_X3-Pad3_ VDD AND +X4 b a Net-_X4-Pad3_ VDD AND +V2 b GND dc 5 +V3 c GND dc 5 +V4 VDD GND dc 5 +.tran .25m 30m +.end diff --git a/digital ciruits/FA/FA.kicad_pcb b/digital ciruits/FA/FA.kicad_pcb new file mode 100644 index 0000000..02c8ecb --- /dev/null +++ b/digital ciruits/FA/FA.kicad_pcb @@ -0,0 +1 @@ +(kicad_pcb (version 4) (host kicad "dummy file") ) diff --git a/digital ciruits/FA/FA.pro b/digital ciruits/FA/FA.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/digital ciruits/FA/FA.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] diff --git a/digital ciruits/FA/FA.sch b/digital ciruits/FA/FA.sch new file mode 100644 index 0000000..62185eb --- /dev/null +++ b/digital ciruits/FA/FA.sch @@ -0,0 +1,425 @@ +EESchema Schematic File Version 4 +LIBS:FA-cache +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 7700 3650 7700 3050 +Wire Wire Line + 7700 3050 7950 3050 +Wire Wire Line + 5350 2300 5350 3550 +Wire Wire Line + 5350 3550 6850 3550 +Wire Wire Line + 5350 2100 5200 2100 +Wire Wire Line + 5150 2100 5150 3750 +Wire Wire Line + 5150 3750 6850 3750 +$Comp +L pspice:VSOURCE V1 +U 1 1 5B04F8C7 +P 2350 2450 +F 0 "V1" H 2578 2496 50 0000 L CNN +F 1 "VSOURCE" H 2578 2405 50 0000 L CNN +F 2 "" H 2350 2450 50 0001 C CNN +F 3 "" H 2350 2450 50 0001 C CNN +F 4 "V" H 2350 2450 50 0001 C CNN "Spice_Primitive" +F 5 "dc 0" H 2350 2450 50 0001 C CNN "Spice_Model" +F 6 "Y" H 2350 2450 50 0001 C CNN "Spice_Netlist_Enabled" + 1 2350 2450 + 1 0 0 -1 +$EndComp +Connection ~ 5200 2100 +Wire Wire Line + 5200 2100 5150 2100 +Wire Wire Line + 5000 2100 5000 2300 +Wire Wire Line + 5000 2300 5350 2300 +$Comp +L power:GND #PWR01 +U 1 1 5B050305 +P 2800 4050 +F 0 "#PWR01" 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+F 6 "Y" H 5700 2200 50 0001 C CNN "Spice_Netlist_Enabled" +F 7 "C:\\Users\\Mind\\Downloads\\Kicad\\new_file\\libs\\spice_models.lib" H 5700 2200 50 0001 C CNN "Spice_Lib_File" + 1 5700 2200 + 1 0 0 -1 +$EndComp +Connection ~ 5350 2300 +Wire Wire Line + 6350 2100 6200 2100 +Wire Wire Line + 6200 2100 6200 2350 +Wire Wire Line + 6200 2350 6050 2350 +Connection ~ 6050 2350 +Wire Wire Line + 6050 2350 6050 2250 +$Comp +L FA-rescue:XOR-xor_sub X2 +U 1 1 5B32BD46 +P 6700 2200 +F 0 "X2" H 6700 2541 39 0000 C CNN +F 1 "XOR" H 6700 2466 39 0000 C CNN +F 2 "" H 6700 2200 50 0001 C CNN +F 3 "" H 6700 2200 50 0001 C CNN +F 4 "X" H 6700 2200 50 0001 C CNN "Spice_Primitive" +F 5 "XOR" H 6700 2200 50 0001 C CNN "Spice_Model" +F 6 "Y" H 6700 2200 50 0001 C CNN "Spice_Netlist_Enabled" +F 7 "C:\\Users\\Mind\\Downloads\\Kicad\\new_file\\libs\\spice_models.lib" H 6700 2200 50 0001 C CNN "Spice_Lib_File" + 1 6700 2200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7050 2250 7450 2250 +Connection ~ 6400 2500 +Wire Wire Line + 6050 2950 6850 2950 +Wire Wire Line + 6050 2350 6050 2950 +Wire Wire Line + 6800 2500 6800 2750 +Wire Wire Line + 6800 2750 6850 2750 +$Comp +L FA-rescue:and-and_sub X3 +U 1 1 5B321D1B +P 7100 2800 +F 0 "X3" H 7150 2528 50 0000 C CNN +F 1 "and" H 7150 2600 50 0000 C CNN +F 2 "" H 7100 2800 50 0001 C CNN +F 3 "" H 7100 2800 50 0001 C CNN +F 4 "X" H 7100 2800 50 0001 C CNN "Spice_Primitive" +F 5 "AND" H 7100 2800 50 0001 C CNN "Spice_Model" +F 6 "Y" H 7100 2800 50 0001 C CNN "Spice_Netlist_Enabled" +F 7 "C:\\Users\\Mind\\Downloads\\Kicad\\new_file\\libs\\spice_models.lib" H 7100 2800 50 0001 C CNN "Spice_Lib_File" + 1 7100 2800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7350 2850 7950 2850 +$Comp +L power:VDD #PWR06 +U 1 1 5B332956 +P 6050 2100 +F 0 "#PWR06" H 6050 1950 50 0001 C CNN +F 1 "VDD" H 6067 2273 50 0000 C CNN +F 2 "" H 6050 2100 50 0001 C CNN +F 3 "" H 6050 2100 50 0001 C CNN + 1 6050 2100 + 1 0 0 -1 +$EndComp +$Comp +L power:VDD #PWR07 +U 1 1 5B3329A9 +P 7050 2100 +F 0 "#PWR07" H 7050 1950 50 0001 C CNN +F 1 "VDD" H 7067 2273 50 0000 C CNN +F 2 "" H 7050 2100 50 0001 C CNN +F 3 "" H 7050 2100 50 0001 C CNN + 1 7050 2100 + 1 0 0 -1 +$EndComp +$Comp +L power:VDD #PWR08 +U 1 1 5B3329CE +P 7100 2550 +F 0 "#PWR08" H 7100 2400 50 0001 C CNN +F 1 "VDD" H 7117 2723 50 0000 C CNN +F 2 "" H 7100 2550 50 0001 C CNN +F 3 "" H 7100 2550 50 0001 C CNN + 1 7100 2550 + 1 0 0 -1 +$EndComp +$Comp +L power:VDD #PWR09 +U 1 1 5B332A1A +P 7100 3350 +F 0 "#PWR09" H 7100 3200 50 0001 C CNN +F 1 "VDD" H 7117 3523 50 0000 C CNN +F 2 "" H 7100 3350 50 0001 C CNN +F 3 "" H 7100 3350 50 0001 C CNN + 1 7100 3350 + 1 0 0 -1 +$EndComp +$Comp +L power:VDD #PWR010 +U 1 1 5B332AC1 +P 8650 2850 +F 0 "#PWR010" H 8650 2700 50 0001 C CNN +F 1 "VDD" H 8667 3023 50 0000 C CNN +F 2 "" H 8650 2850 50 0001 C CNN +F 3 "" H 8650 2850 50 0001 C CNN + 1 8650 2850 + 1 0 0 -1 +$EndComp +$Comp +L power:VDD #PWR011 +U 1 1 5B332B72 +P 10400 2000 +F 0 "#PWR011" H 10400 1850 50 0001 C CNN +F 1 "VDD" H 10417 2173 50 0000 C CNN +F 2 "" H 10400 2000 50 0001 C CNN +F 3 "" H 10400 2000 50 0001 C CNN + 1 10400 2000 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR012 +U 1 1 5B332D48 +P 10400 3050 +F 0 "#PWR012" H 10400 2800 50 0001 C CNN +F 1 "GND" H 10405 2877 50 0000 C CNN +F 2 "" H 10400 3050 50 0001 C CNN +F 3 "" H 10400 3050 50 0001 C CNN + 1 10400 3050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 10400 2300 10400 2000 +Wire Wire Line + 10400 3050 10400 2900 +$Comp +L FA-rescue:and-and_sub X4 +U 1 1 5B334BB6 +P 7100 3600 +F 0 "X4" H 7150 3328 50 0000 C CNN +F 1 "and" H 7150 3400 50 0000 C CNN +F 2 "" H 7100 3600 50 0001 C CNN +F 3 "" H 7100 3600 50 0001 C CNN +F 4 "X" H 7100 3600 50 0001 C CNN "Spice_Primitive" +F 5 "AND" H 7100 3600 50 0001 C CNN "Spice_Model" +F 6 "Y" H 7100 3600 50 0001 C CNN "Spice_Netlist_Enabled" +F 7 "C:\\Users\\Mind\\Downloads\\Kicad\\new_file\\libs\\spice_models.lib" H 7100 3600 50 0001 C CNN "Spice_Lib_File" + 1 7100 3600 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2800 3600 2800 4050 +$Comp +L pspice:VSOURCE V2 +U 1 1 5B335574 +P 2800 3300 +F 0 "V2" H 3028 3346 50 0000 L CNN +F 1 "VSOURCE" H 3028 3255 50 0000 L CNN +F 2 "" H 2800 3300 50 0001 C CNN +F 3 "" H 2800 3300 50 0001 C CNN +F 4 "V" H 2800 3300 50 0001 C CNN "Spice_Primitive" +F 5 "dc 5" H 2800 3300 50 0001 C CNN "Spice_Model" +F 6 "Y" H 2800 3300 50 0001 C CNN "Spice_Netlist_Enabled" + 1 2800 3300 + 1 0 0 -1 +$EndComp +$Comp +L pspice:VSOURCE V3 +U 1 1 5B3355B4 +P 3300 4050 +F 0 "V3" H 3528 4096 50 0000 L CNN +F 1 "VSOURCE" H 3528 4005 50 0000 L CNN +F 2 "" H 3300 4050 50 0001 C CNN +F 3 "" H 3300 4050 50 0001 C CNN +F 4 "V" H 3300 4050 50 0001 C CNN "Spice_Primitive" +F 5 "dc 5" H 3300 4050 50 0001 C CNN "Spice_Model" +F 6 "Y" H 3300 4050 50 0001 C CNN "Spice_Netlist_Enabled" + 1 3300 4050 + 1 0 0 -1 +$EndComp +Text GLabel 7450 2000 0 50 Output ~ 0 +sum +Text GLabel 8900 2800 0 50 Output ~ 0 +carry +Wire Wire Line + 7450 2000 7450 2250 +Connection ~ 7450 2250 +Wire Wire Line + 7450 2250 7700 2250 +Wire Wire Line + 8650 3000 8900 3000 +Wire Wire Line + 8900 2800 8900 3000 +Connection ~ 8900 3000 +Wire Wire Line + 8900 3000 9000 3000 +Text GLabel 2700 1450 0 50 Input ~ 0 +a +Text GLabel 3000 2000 0 50 Input ~ 0 +b +Text GLabel 3600 2400 0 50 Input ~ 0 +c +Wire Wire Line + 3600 2400 3600 2600 +Connection ~ 3600 2600 +Wire Wire Line + 3000 2000 3050 2000 +Wire Wire Line + 3050 2000 3050 2100 +Connection ~ 3050 2100 +Wire Wire Line + 2700 1450 2700 1900 +Connection ~ 2700 1900 +Wire Wire Line + 2700 1900 5200 1900 +Wire Wire Line + 3050 2100 5000 2100 +Wire Wire Line + 3600 2600 6400 2600 +$Comp +L pspice:VSOURCE V4 +U 1 1 5B320F2D +P 10400 2600 +F 0 "V4" H 10628 2646 50 0000 L CNN +F 1 "VSOURCE" H 10628 2555 50 0000 L CNN +F 2 "" H 10400 2600 50 0001 C CNN +F 3 "" H 10400 2600 50 0001 C CNN +F 4 "V" H 10400 2600 50 0001 C CNN "Spice_Primitive" +F 5 "dc 5" H 10400 2600 50 0001 C CNN "Spice_Model" +F 6 "Y" H 10400 2600 50 0001 C CNN "Spice_Netlist_Enabled" + 1 10400 2600 + 1 0 0 -1 +$EndComp +Text Notes 7900 5450 0 50 ~ 0 +.tran .25m 30m +$EndSCHEMATC diff --git a/digital ciruits/FA/sym-lib-table b/digital ciruits/FA/sym-lib-table new file mode 100644 index 0000000..548b02d --- /dev/null +++ b/digital ciruits/FA/sym-lib-table @@ -0,0 +1,6 @@ +(sym_lib_table
+ (lib (name and_sub)(type Legacy)(uri H:/and_sub/and_sub.lib)(options "")(descr ""))
+ (lib (name or_sub)(type Legacy)(uri C:/Users/Mind/Downloads/Kicad/Project/or_sub/or_sub.lib)(options "")(descr ""))
+ (lib (name xor_sub)(type Legacy)(uri C:/Users/Mind/Downloads/Kicad/Project/xor_sub/xor_sub.lib)(options "")(descr ""))
+ (lib (name FA-rescue)(type Legacy)(uri ${KIPRJMOD}/FA-rescue.lib)(options "")(descr ""))
+)
|