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1 files changed, 117 insertions, 0 deletions
diff --git a/analog circuits/Shunt_Clipper/Shunt_Clipper.sch b/analog circuits/Shunt_Clipper/Shunt_Clipper.sch
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+EESchema Schematic File Version 4
+LIBS:Shunt_Clipper-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
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+F 3 "" H 4300 3450 50 0001 C CNN
+F 4 "V" H 4300 3450 50 0001 C CNN "Spice_Primitive"
+F 5 "sin(0 5 50)" H 4300 3450 50 0001 C CNN "Spice_Model"
+F 6 "Y" H 4300 3450 50 0001 C CNN "Spice_Netlist_Enabled"
+ 1 4300 3450
+ 1 0 0 -1
+$EndComp
+$Comp
+L Device:R R1
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+F 1 "1k" V 4834 2800 50 0000 C CNN
+F 2 "" V 4880 2800 50 0001 C CNN
+F 3 "~" H 4950 2800 50 0001 C CNN
+ 1 4950 2800
+ 0 1 1 0
+$EndComp
+$Comp
+L Device:D D1
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+F 1 "D" V 5805 3171 50 0000 R CNN
+F 2 "" H 5850 3250 50 0001 C CNN
+F 3 "~" H 5850 3250 50 0001 C CNN
+ 1 5850 3250
+ 0 -1 -1 0
+$EndComp
+$Comp
+L pspice:VSOURCE V2
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+F 2 "" H 5850 3950 50 0001 C CNN
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+F 4 "V" H 5850 3950 50 0001 C CNN "Spice_Primitive"
+F 5 "dc 2.4" H 5850 3950 50 0001 C CNN "Spice_Model"
+F 6 "Y" H 5850 3950 50 0001 C CNN "Spice_Netlist_Enabled"
+ 1 5850 3950
+ -1 0 0 1
+$EndComp
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+$Comp
+L power:GND #PWR01
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+$EndComp
+Wire Wire Line
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+Text Notes 3300 5100 0 50 ~ 0
+.tran 5m 100m
+Text GLabel 5600 2600 0 50 Output ~ 0
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+$EndSCHEMATC