1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
{
"cells": [
{
"cell_type": "markdown",
"metadata": {},
"source": [
"# Chapter 11: Logic circuits"
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"## Example 11.3: Determine_output_for_given_logic_circuit.sce"
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {
"collapsed": true
},
"outputs": [],
"source": [
"//Caption:Determine output for given logic circuit\n",
"//Ex11.3\n",
"clc;\n",
"clear;\n",
"close;\n",
"A=1\n",
"B=0\n",
"C=1\n",
"D=1\n",
"c=A-1\n",
"n=c//Output of NOT gate\n",
"a=B*C*D//Output of AND gate\n",
"o=c+(B*C*D)//Output of OR gate\n",
"disp(o,'Output for given logic circuit is=')"
]
}
],
"metadata": {
"kernelspec": {
"display_name": "Scilab",
"language": "scilab",
"name": "scilab"
},
"language_info": {
"file_extension": ".sce",
"help_links": [
{
"text": "MetaKernel Magics",
"url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
}
],
"mimetype": "text/x-octave",
"name": "scilab",
"version": "0.7.1"
}
},
"nbformat": 4,
"nbformat_minor": 0
}
|