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-rw-r--r--Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/10-Voltage_regulator.ipynb384
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-rw-r--r--Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/6-Operational_Transconductance_Amplefier.ipynb56
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+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 1: Differential amplifiers"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.10: operating_point_voltage_gain_ip_and_op_resistance.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"// example 1.10\n",
+"//page 34, figure 1.39\n",
+"Xdc=100;Xac=100;// gain\n",
+"Vbe=0.7;Vee=12;Vcc=12;//given voltage in volts\n",
+"Re=8200;Rin=150;Rc=3300;// given resistance in ohm\n",
+"Hfe=100;Hie=1000;// given\n",
+"Icq=(Vee-Vbe)/(2*Re+(Rin/Xdc))\n",
+"Vceq=Vcc+Vbe-Rc*Icq\n",
+"disp(Icq,Vceq)//operating point(volt,ampere)\n",
+"Aid=(Hfe*Rc)/(Rin+Hie);// voltage gain\n",
+"disp(Aid)// result\n",
+"Ri=2*(Rin+Hie)// input resistance\n",
+"disp(Ri)//in ohm\n",
+"Ro=Rc;// output resistance\n",
+"disp(Ro)//output resistance in ohm"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.11: output_voltage_and_CMRR.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"// example 1.11\n",
+"// page 35\n",
+"Rin=1000;Rc=1000;Re=2500000;// resistance is in ohm(given)\n",
+"Hfe=50;Hre=0;Hoe=0;Hie=1000;//given\n",
+"Vid=1*10^-3;Vc=20*10^-3// voltage in volts\n",
+"Aid=-(Hfe*Rc)/(Rin+Hie);// differential gain Aid\n",
+"Vout=Aid*Vid;// output voltage\n",
+"disp(Vout)//result in ampere.\n",
+"// to calculate CMRR we have to first find Acm common mode gain\n",
+"Acm=((2*Re*Hoe-Hfe)*Rc)/(2*Re*(1+Hfe)+Rin+Hie)// common mode gain\n",
+"CMRR=Aid/Acm;//CMRR\n",
+"disp(CMRR)//result\n",
+"CMRRdb=20*log10(CMRR);\n",
+"disp(CMRRdb)// result CMRR is in db"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.12: DC_characteristics.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"// example 1.12\n",
+"// page no.38, figure 1.44\n",
+"Kn1=.2*10^-3;Kn2=.2*10^-3;Kn3=.4*10^-3;Kn4=.4*10^-3;// all in mA/V^2\n",
+"Vtn=1;Vcc=12;Vee=-12;// voltage is in volts\n",
+"R1=27000;Rd=15000;\n",
+"// calculation of I1 and Vgs4\n",
+"// applying KVL=> Vcc-Vee=I1*R1+Vgs4------------eq(1)\n",
+"// I1=Kn3*(Vgs4-Vtn)^2-----------eq(2)\n",
+"// put eq (2) in eq (1)\n",
+"//((Vcc-Vee)-Vgs4)/R1=Kn3*(Vgs4-Vtn)^2\n",
+"p1=poly([-13.2 -20.6 10],'Vgs4','c');\n",
+"roots(p1)// we have to take only value positive and greater than Vtn\n",
+"I1=Kn3*(2.573-Vtn)^2;//only positive and value greater than Vtn of Vgs4 taken \n",
+"disp(I1)\n",
+"//calculation of drain current Iq\n",
+"Iq=I1;// identical M4 and M3\n",
+"disp(Iq)\n",
+"// calculation of Id1 and Id2\n",
+"Id1=Iq/2;\n",
+"Id2=Iq/2;\n",
+"disp(Id1,Id2)// identical\n",
+"// calculation of gate voltage for M1 and M2\n",
+"Vgs1=Vtn+sqrt(Id1/Kn1);// using Id1=Kn1*(Vgs1-Vtn)^2\n",
+"disp(Vgs1)// result gate to source voltage\n",
+"Vgs2=Vgs1;// since they are identical\n",
+"disp(Vgs2)\n",
+"//calculation of Vout1 and Vout2\n",
+"Vout1=Vcc-Id1*Rd;\n",
+"disp(Vout1)// under quiescent condition\n",
+"Vout2=Vcc-Id2*Rd;\n",
+"disp(Vout2)\n",
+"// calculation of maximum common mode input voltage Vcmmax\n",
+"Vds1=Vgs1-Vtn;\n",
+"Vcmmax=Vout1-Vds1+Vgs1;//maximum common mode voltage \n",
+"disp(Vcmmax)// result is in volts\n",
+"// calculation of minimum common mode input voltage Vcmmin \n",
+"Vds4=Vgs2-Vtn;\n",
+"Vcmmin=Vgs1+Vds4-Vcc;// minimum common mode input voltage\n",
+"disp(Vcmmin)// volts"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.13: Aid_Acm_CMRR.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"// example 1.13\n",
+"// page 44, figure 1.52\n",
+"Rl=%inf;B=100;Rin=0;\n",
+"Re=1;// let suppose\n",
+"Iq=4*10^-3;\n",
+"Vt=26*10^-3;Va2=150;Va4=100;\n",
+"I2=Iq/2;\n",
+"I4=Iq/2;\n",
+"disp(I2,I4)\n",
+"Gm=Iq/(2*Vt);//parameters\n",
+"Ro2=Va2/I2;\n",
+"Ro4=Va4/I4;\n",
+"Aid=Gm*((Ro2*Ro4)/(Ro2+Ro4));//Aid =Gm(Ro2||Ro4||Rl),Rl=%inf\n",
+"disp(Aid)//differential mode gain Aid\n",
+"r=(2*(B*Vt))/Iq// Vt=26mV at 300k\n",
+"//Re=1/X*Iq and Rc=1/x*Iq/2\n",
+"//Rc/Re=2\n",
+"Rc=2*Re;\n",
+"//assuming 2*(1+B)*Re/(r+Rin)>>>>1\n",
+"//Acm=((-Gm*Rc)/1+((2*(1+B)*Re)/(r+Rin)));\n",
+"k=(2*(1+B)*Re)/((r+Rin)/1000)\n",
+"Acm=-((Gm*Rc)*1000)/k;\n",
+"disp(Acm)// common mode gain\n",
+"CMRR=Aid/-Acm;\n",
+"disp(CMRR)//\n",
+"CMRRdb=20*log10(CMRR);\n",
+"disp(CMRRdb)// result is in db"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.14: voltage_gain_and_ip_resistance_and_operating_point.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"//example 1.14\n",
+"// page 46, figure1.54\n",
+"Bac=100;Bdc=100;\n",
+"Vbe=.715;Vd1=.715; Vz=6.2;Vee=-10;Vcc=10;Vt=26*10^-3;// at room temprature\n",
+"Re=2700;Rin=10000;Rc=4700;//assuming Rin= 10k\n",
+"Izt=41*10^-3;\n",
+"Vin=0;// for dc analysis\n",
+"//calculation of the value of Ie,Icq1 and Icq2\n",
+"Vb3=Vee+Vz+Vd1\n",
+"Ve3=Vb3-Vbe\n",
+"Ie=(Ve3-Vee)/Re;\n",
+"disp(Ie)\n",
+"Ie1=Ie/2\n",
+"Ie2=Ie/2\n",
+"A=B/(1+B);\n",
+"Icq=A*Ie1;//(B/(B+1))*Ie1\n",
+"disp(Icq)\n",
+"Icq2=Icq;\n",
+"disp(Icq2)\n",
+"Gm=Icq/Vt// Vt at room temp 26mA\n",
+"r=(B*Vt)/Icq\n",
+"Ib=Icq/B\n",
+"Ve1=-Ib*Rin-Vbe;\n",
+"disp(Ve1)//result\n",
+"Vc1=Vcc-Icq*Rc;\n",
+"disp(Vc1)\n",
+"Vceq=Vc1-Ve1;\n",
+"disp(Vceq,Icq)//result operating point "
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.15: collector_current.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"// example 1.15\n",
+"//page 47, figure 1.57\n",
+"Bdc=100;Bac=100;\n",
+"Vbe=.715;\n",
+"R=5600;\n",
+"Vr=-(Vbe-10);\n",
+"Ir=Vr/R;// Ir=Ic+Ib=Vr/R\n",
+"disp(Ir)\n",
+"Ic=Ir*(Bdc/(1+Bdc));//Ir=Ic+Ib=Ic+Ic/Bdc\n",
+"disp(Ic)//ampre\n",
+"Ic2=Ir\n",
+"Ic3=Ir\n",
+"Ic4=Ir"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.16: smallest_and_largest_possible_value_of_current.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"//example 1.16\n",
+"//page 48,figure 1.59\n",
+"Ie=400*10^-6;\n",
+"Bmin=80;Bmax=120;\n",
+"//Ie=Ie1+Ie2 for identical transistor Ie1=Ie2\n",
+"Ie1=Ie/2\n",
+"Ie2=Ie/2\n",
+"IB1max=Ie1/(1+Bmin)\n",
+"IB2max=Ie2/(1+Bmin)\n",
+"IBmax=(IB1max+IB2max)/2;\n",
+"disp(IBmax)//largest input bais current\n",
+"IB1min=Ie1/(1+Bmax)\n",
+"IB2min=Ie2/(1+Bmax)\n",
+"IBmin=(IB1min+IB2min)/2;\n",
+"disp(IBmin)// smallest current\n",
+"Iios=IBmax-IBmin// input bais current\n",
+"disp(Iios)//result"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.17: Ri_Ro_differential_and_common_mode_voltage_gain.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter1\n",
+"//example 1.17\n",
+"//page 49, figure 1.60\n",
+"I=.2*10^-3; B=200;Va=100;Rl=%inf;\n",
+"Vt=26*10^-3//assuming at room temprature\n",
+"I2=I/2\n",
+"I4=I2\n",
+"r02=Va/I2;\n",
+"disp(r02)\n",
+"r04=Va/I4;\n",
+"disp(r04)\n",
+"Gm=2/Vt\n",
+"Aid=Gm/((1/r02)+(1/r04)+(1/Rl));\n",
+"disp(Aid)\n",
+"Ri=2*(B/I)//Ri=2*r\n",
+"disp(Ri)\n",
+"Ri=(r02*r04)/(r02+r04);\n",
+"disp(Ri)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.1: Vout_and_CMMR.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"//example 1.3\n",
+"// page no.18,figure no.1.22\n",
+"//given\n",
+"Rin1=100;Rin2=100;\n",
+"Re=2700;Rc=4700;\n",
+"Hfe=100;\n",
+"Hie=1000;Hoe=0;\n",
+"Aid=(Hfe*Rc)/(Rin1+Hie);\n",
+"disp(Aid)//differential gain\n",
+"//Acm=(2*Re*Hoe-Hfe)*Rc/(2*Re(1+Hfe)+(Rin1+Hie)(1+2*Re*Hoe)),and Hoe=0\n",
+"x=2*Re*1+2*Re*Hfe+Rin1+Hie;\n",
+"Acm=-(Hfe*Rc)/x;\n",
+"disp(Acm)//neglecting the negative value.taking mod of Acm\n",
+"Acm=-(Acm)\n",
+"CMRR=20*log10(Aid/Acm);\n",
+"disp(CMRR)//is in db\n",
+"Rin=2*Rin1+2*Hie;\n",
+"disp(Rin)//input resistance\n",
+"Ro=Rc\n",
+"disp(Ro)//output resistance"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.2: Icq_and_Vceq.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"// example 1.2\n",
+"//page 17. figure 1.21\n",
+"//given\n",
+"Rc=4700,Re=2700;// Resistor is in ohm\n",
+"Vcc=12;Vee=12;// voltage is in volt\n",
+"Vbe=.7;// assuming Vbe\n",
+"Ie=(Vee-Vbe)/(2*Re);\n",
+"disp(Ie)//current is in ampere\n",
+"Icq=Ie;\n",
+"disp(Icq)//current is in ampere\n",
+"Vc=Icq*Rc;\n",
+"Vce=Vcc+Vbe-Vc;\n",
+"disp(Vce)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.3: Aid_and_Acm_and_CMRR_and_Ri_and_Ro.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"// example 1.3\n",
+"//page 18\n",
+"Rin1=100;Rin2=100;Re=2.7*10^3;Rc=4.7*10^3;\n",
+"hfe=100;hie=1000;hoe=0;\n",
+"Aid=(hfe*Rc)/(Rin1+hie);//Differential gain\n",
+"disp(Aid)\n",
+"Acm=((2*Re*hoe-hfe)*Rc)/(2*Re*(1+hfe)+(Rin1+hie)*(1+2*Re*hoe));//comman mode gain\n",
+"Acm=-Acm// neglecting negative sign\n",
+"disp(Acm)\n",
+"CMRR=Aid/Acm\n",
+"CMRR=20*log10(CMRR);\n",
+"disp(CMRR)\n",
+"Rin=2*(Rin1+hie)//input resistance\n",
+"Ro=Rc//output resistance"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.4: constant_current_I.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"//example 1.4\n",
+"// page 23,figure 1.27\n",
+"Vee=10;R1=2400;R2=2400;R3=1000;Vbe=.7;//given\n",
+"I=(Vee-(R2*Vee/(R1+R2))-Vbe)/R3;\n",
+"disp(I)// result is in ampere"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.5: value_of_RE.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"// example 1.5\n",
+"//page 27.figure 1.31\n",
+"Ic1=10*10^-6;Vcc=50;Vbe=.7;R=50*10^3;\n",
+"Ic2=(Vcc-Vbe)/R;\n",
+"disp(Ic2);\n",
+"Vt=26*10^-3// assume at room temperature of 300k\n",
+"Re=Vt/Ic1*log(Ic2/Ic1);\n",
+"disp(Re)//result in ohm"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.6: common_mode_op_voltage_and_differential_mode_output.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"// exmaple 3.6\n",
+"//page 124 , figure 3.17\n",
+"R1=1*10^3;R2=R1;R3=R1;//given\n",
+"Rf=1*10^3;//given\n",
+"Vin1=2;Vin2=1;Vin3=4;//given\n",
+"Vout=-((Rf/R1)*Vin1+(Rf/R2)*Vin2+(Rf/R3)*Vin3);\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.7: Dc_bias_point_and_ip_and_op_resistance.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"// example 1.7\n",
+"//page 32,figure 1.36\n",
+"Vee=12;Vbe=0.7;Rin=100;Re=8400;Rc=3900;Vcc=12;\n",
+"Xdc=100// dc gain\n",
+"Icq=(Vee-Vbe)/((Rin/Xdc)+2*Re);\n",
+"Vceq=Vcc+Vbe-Icq*Rc;\n",
+"disp(Vceq,Icq)//the DC base point or Q point is at(volt,ampere)\n",
+"Hie=1100// assuming\n",
+"Ri=2*(Rin+Hie);//input resistance \n",
+"disp(Ri)// input resistance in ohm\n",
+"Ro=Rc// output resistance"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.8: Icq_and_Vceq_voltage_gain_ip_and_op_resistance.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 1\n",
+"// example 1.8\n",
+"// page 33, figure 1.37:\n",
+"Xdc=100;Xac=100;//AC and DC gain\n",
+"Vbe=0.7;Vee=10;Vcc=10;// voltage is in volts\n",
+"Re=4700;Rin=50;Rc=2700;//resistance in ohm\n",
+"Hfe=100;Hie=1100// assuming\n",
+"Icq=(Vee-Vbe)/(2*Re+(Rin/Xdc));\n",
+"disp(Icq)//result current\n",
+"Vceq=Vcc+Vbe-Rc*Icq;\n",
+"disp(Vceq)// result voltage\n",
+"Aid=(Hfe*Rc)/(2*(Rin+Hie));//voltage gain Aid\n",
+"disp(Aid)\n",
+"Ri=2*(Rin+Hie)// input resistance\n",
+"disp(Ri)//in ohm\n",
+"Ro=Rc;// output resistance\n",
+"disp(Ro)//ohm"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 1.9: operating_point_voltage_gain_ip_and_op_resistance.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 1\n",
+"// example 1.9\n",
+"//page 34, figure 1.38\n",
+"Xdc=100;Xac=100;// gain\n",
+"Vbe=0.7;Vee=12;Vcc=12;//given voltage in volts\n",
+"Re=4700;Rin=50;Rc=2700;// given resistance in ohm\n",
+"Hfe=100;Hie=1100;// given\n",
+"Icq=(Vee-Vbe)/(2*Re+(Rin/Xdc));\n",
+"Vceq=Vcc+Vbe-Rc*Icq;\n",
+"disp(Icq,Vceq)//operating point(volt,ampere)\n",
+"Aid=(Hfe*Rc)/(Rin+Hie);// voltage gain\n",
+"disp(Aid)// result\n",
+"Ri=2*(Rin+Hie)// input resistance\n",
+"disp(Ri)//in ohm\n",
+"Ro=Rc;// output resistance\n",
+"disp(Ro)//output resistance in ohm"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/10-Voltage_regulator.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/10-Voltage_regulator.ipynb
new file mode 100644
index 0000000..e8fc49f
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/10-Voltage_regulator.ipynb
@@ -0,0 +1,384 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 10: Voltage regulator"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.10: min_and_max_output_voltage_for_regulator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.10\n",
+"//page 357\n",
+"Vref=-1.25;\n",
+"Iadj=50*10^-6;\n",
+"R1=240;\n",
+"R2min=0;//to find minimum output voltage correspond to R2min=0\n",
+"Voutmin=Vref*(1+(R2min/R1))+Iadj*R2min;\n",
+"disp(Voutmin)\n",
+"R2max=5*10^3;//for maximum output voltage \n",
+"Voutmax=Vref*(1+(R2max/R1))+Iadj*R2max;\n",
+"disp(Voutmax)//volts"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.11: voltage_IC_723.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter10\n",
+"//example 10.11\n",
+"//page 10.11\n",
+"Vo=5;Io=50*10^-3;\n",
+"Isc=75*10^-3;Vin=15;\n",
+"Vsense=.6;Vref=7;\n",
+"I=1*10^-3;//current through R1 and R2\n",
+"R2=Vo/I;\n",
+"disp(R2)\n",
+"VR1=Vref-Vo;//voltage across R1\n",
+"disp(VR1)\n",
+"R1=VR1/I;\n",
+"disp(R1)\n",
+"R3=R1*R2/(R1+R2);//R3=R1||R2\n",
+"disp(R3)\n",
+"Rsc=Vsense/Isc;\n",
+"disp(Rsc)\n",
+"C1=7.4*10^-6/10;\n",
+"disp(R1,R2,R3,Rsc,C1)//component value"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.12: power_dissipation_in_regulator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.12\n",
+"//page 372\n",
+"Vref=7;Vout=5;Vin=15;\n",
+"Il=1*10^-3;Isc=1.5;Vsense=.65;\n",
+"Imax=150*10^-3;//Imax of IC-723 is 150mA\n",
+"R1=(Vref-Vout)/Il;\n",
+"disp(R1)\n",
+"R2=Vout/Il;\n",
+"disp(R2)\n",
+"R3=(R1*R2)/(R1+R2);\n",
+"disp(R3)\n",
+"Rsc=Vsense/Isc;\n",
+"disp(Rsc)\n",
+"Bmin=Il/Imax\n",
+"Pd=(Vin-Vout)*Isc\n",
+"Icmax=2*Isc;//Maximum collector current\n",
+"disp(Icmax)\n",
+"Vout=0;//maximum collector to emitter voltage can be calculated as under the voltage across Q will maximum when the load is short circuited\n",
+"Vcemax=Vin-Vout;\n",
+"disp(Vcemax)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.13: design_a_regulated_power_supply.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.13\n",
+"//page 373\n",
+"Vref=7;Vsense=.65;\n",
+"Voutmin=9;Voutmax=12; I1=.5;Imax=150*10^-3;\n",
+"R2=10*10^3;//let assume\n",
+"//(R1+R2)/R2=Vout/Vref-----------eq(1)\n",
+"R1min=2*R2/7;\n",
+"disp(R1min)\n",
+"Voutmax=12\n",
+"R1max=5*R2/7;//using eq (1)\n",
+"disp(R1max)\n",
+"Rsc=Vsense/Il;\n",
+"disp(Rsc)\n",
+"R3=(R1max*R2)/(R1max+R2)\n",
+"Bmin=Il/Imax;\n",
+"disp(Bmin)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.14: current_source_using_IC_7805.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.14\n",
+"//page 376\n",
+"Rl=10;Iq=4.3*10^-3;\n",
+"Vr=5;Il=.5;\n",
+"// Il=Vr/R+Iq\n",
+"R=Vr/(Il-Iq);\n",
+"disp(R)\n",
+"power=(Il^2)*R;//wattage of reisstor\n",
+"disp(power)\n",
+"Vout=Vr+Il*R;//output voltage with respect to ground\n",
+"disp(Vout)\n",
+"Vd=2;//minimum voltage drop across IC 7805 which is called as drop out voltage is 2V\n",
+"Vin=Vout+Vd;\n",
+"disp(Vin)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.1: regulated_dc_supply.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.1\n",
+"//page 345\n",
+"Vnl=12;\n",
+"Vfl=11.6;\n",
+"Ilmax=100*10^-3;\n",
+"LR=Vnl-Vfl;//load regulation\n",
+"disp(LR)\n",
+"percentage=((Vnl-Vfl)/Vfl)*100//% LOAD REGULATION\n",
+"Vout=LR;\n",
+"Ro=Vout/Ilmax;//output resistance\n",
+"disp(Ro)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.2: rms_value_of_ripple.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter10\n",
+"//example 10.2\n",
+"//page347\n",
+"RF=.1;//ripple factor\n",
+"Vldc=10;\n",
+"//ripple factor=Vrms/Vldc\n",
+"Vrms=Vldc*RF;\n",
+"disp(Vrms)\n",
+"Vp_p=2*sqrt(2)*Vrms;//peak to peak ripple\n",
+"disp(Vp_p)//volts"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.3: series_regulator_circuit.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.3\n",
+"//page349\n",
+"V_=6;Vz=6;//potential at inverting(-) input is equal to vitual\n",
+"Vr2=Vz;\n",
+"Vin=30;\n",
+"Rl=200;\n",
+"R2=5*10^3;\n",
+"R1=0;//for minimum Vout\n",
+"Voutmin=((R1+R2)/R2)*Vz;//minimum output voltage\n",
+"disp(Voutmin)//minimum voltage\n",
+"R1=10*10^3;//for maximum output voltage\n",
+"Voutmax=((R1+R2)/R2)*Vz;\n",
+"disp(Voutmax)//maximum output voltage\n",
+"disp(Voutmax,Voutmin)//range when potentiometer change from 0 to 10k\n",
+"Vce=Vin-Voutmax;//when R1=10k and Vout=18\n",
+"disp(Vce)\n",
+"Ic=Voutmax/Rl;\n",
+"disp(Ic)\n",
+"Pd=Vce*Ic;//power\n",
+"disp(Pd)//watt"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.4: output_voltage_for_regulator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//example 10.4\n",
+"//page 350 figure 10.9\n",
+"Vz=5;\n",
+"V_=5;\n",
+"R2=15;R3=15;\n",
+"//V_ across R3\n",
+"Vout=((R2+R3)/R3)*(V_)//voltage across R3\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.5: power_rating.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"// example 10.5\n",
+"// page 351\n",
+"R1=20\n",
+"Vin=12;\n",
+"Vout=0;//worst case for masimum power across R1\n",
+"VR1=Vin-Vout;\n",
+"disp(VR1)\n",
+"PR1=VR1^2/R1;\n",
+"disp(PR1)//watt"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 10.6: adjustable_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 10\n",
+"//eaxmple 10.6\n",
+"//page 354\n",
+"Iq=4.3*10^-3;\n",
+"R2=100;\n",
+"Vout=7;//for maximum output voltage\n",
+"Vr=5;//for R2 is maximum\n",
+"//Vout=Vout(1+R2/R1)+Iq*R2\n",
+"R1=100/(((Vout-Iq*R2)/Vr)-1)"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/11-Phase_locked_loop.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/11-Phase_locked_loop.ipynb
new file mode 100644
index 0000000..d2f5b10
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/11-Phase_locked_loop.ipynb
@@ -0,0 +1,92 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 11: Phase locked loop"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 11.1: free_running_frequency_lock_range_capture_range.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 11\n",
+"// example 11.1\n",
+"//page 394\n",
+"Rt=10*10^3;Ct=.005*10^-6;C=10*10^-6;\n",
+"V=20;//in volts\n",
+"fout=.25/(Ct*Rt);//free running frequency\n",
+"disp(fout)\n",
+"fL=(8*fout)/V;//lock range\n",
+"disp(fL)// it may be -ve or +ve\n",
+"fc=sqrt(fL/(2*3.14*3.6*1000*C));// capture range\n",
+"disp(fc)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 11.2: frequency_of_oscillator_and_phase_accumulator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 11\n",
+"//example 11.2\n",
+"//page 401\n",
+"foutmax=200*10^3;\n",
+"foutmin=4;\n",
+"n=%s;\n",
+"fclk=2.2*foutmax;\n",
+"disp(fclk)//maximum output frequency\n",
+"//resolution=foutmin=fclk/2^n\n",
+"2*n==fclk/foutmin;\n",
+"//n=fclk/(foutmin*2);\n",
+"//hittrail method n=17\n",
+"n=17\n",
+"disp(n)"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/12-DA_and_AD_converter.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/12-DA_and_AD_converter.ipynb
new file mode 100644
index 0000000..ee1e79e
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/12-DA_and_AD_converter.ipynb
@@ -0,0 +1,370 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 12: DA and AD converter"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.10: digital_output.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"//example 12.10\n",
+"//page 429\n",
+"t1=83.33;\n",
+"Vr=100*10^-3;// reference voltage\n",
+"Vi=100*10^-3;//input voltage\n",
+"Cf=12*10^3;//clock frequency\n",
+"DIGITALVout=Cf*t1*(Vi/Vr)\n",
+"disp(DIGITALVout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.11: conversion_time.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"// example 12.11\n",
+"//page 431\n",
+"f=1*10^6;\n",
+"n=8;//8-bit ADC\n",
+"T=1/f;//time period\n",
+"Tc=T*(n+1);\n",
+"disp(Tc)//conversion time"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.12: maximum_frequency.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"//example 12.12\n",
+"//page 432\n",
+"Tc=9*10^-6;\n",
+"n=8;//8-bit ADC\n",
+"fmax=1/(2*%pi*Tc*2^n);// maximum frequency\n",
+"disp(fmax)//Hz"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.1: resolutio.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"//example 12.1\n",
+"// page 413\n",
+"n=8;// number of bits\n",
+"Vofs=2.55;//in volts\n",
+"R=2^n;//resolution\n",
+"disp(R)\n",
+"Resolution=Vofs/(2^8-1);\n",
+"disp(Resolution)// an input change of 1LSB cause the output to change by 10mV"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.2: final_output_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"// example 12.2\n",
+"// page 413\n",
+"n=4;// 4-bit DAC\n",
+"Vofs=15;\n",
+"inp=0110;\n",
+"resolution=Vofs/(2^n-1);\n",
+"disp(resolution)\n",
+"D=0*2^3+1*2^2+1*2^1+0*2^0;//Decimal value of input\n",
+"disp(D)\n",
+"Vout=D*resolution\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.3: Vofs_and_Vo.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 12\n",
+"// example 12.3\n",
+"// page 414\n",
+"n=8;// 8 bit DAC\n",
+"R=20*10^-3;//resolution V/LSB\n",
+"inpt=10000000;\n",
+"Vofs=R*(2^n-1);\n",
+"disp(Vofs)\n",
+"D=1*2^7+0*2^6+0*2^5+0*2^4+0*2^3+0*2^2+0*2^1+0*2^0;\n",
+"disp(D)\n",
+"Vout=R*D;//output voltage\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.4: step_size_and_analog_output.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter\n",
+"//example 12.4\n",
+"// page 414\n",
+"n=4;// 4-bit R-2R ladder\n",
+"Vofs=5;\n",
+"R=Vofs/(2^n-1);//resolution\n",
+"disp(R)\n",
+"D1=1*2^3+0*2^2+0*2^1+0*2^0;//for input 1000\n",
+"disp(D1)\n",
+"Vout1=R*D1;\n",
+"disp(Vout1)\n",
+"D2=1*2^3+1*2^2+1*2^1+1*2^0;// for input 1111\n",
+"Vout2=R*D2;\n",
+"disp(Vout2)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.5: full_scale_output.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"//example 12.5\n",
+"// page 414\n",
+"n=12;//12-bit DAC\n",
+"R=8*10^-3;// step size\n",
+"Vofs=R*(2^n-1);\n",
+"disp(Vofs)\n",
+"RESpercentage=(R/Vofs)*100\n",
+"D=0*2^11+1*2^10+0*2^9+1*2^8+0*2^7+1*2^6+1*2^5+0*2^4+1*2^3+1*2^2+0*2^1+1*2^0;// decimal value of 010101101101\n",
+"disp(D)\n",
+"Vout=R*D;\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.6: value_of_resistor_and_reference.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"//example 12.6\n",
+"//page 419\n",
+"Vr=10;//let suppose\n",
+"n=4;//4-bit R/2R ladder\n",
+"Res=.5;// given Resolution\n",
+"//Resolution=(1/2^n*Vr/R)*Rf\n",
+"Rf=10;//let choose\n",
+"R=(1/2^n)*(Vr/Res)*Rf;\n",
+"disp(R)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.7: resolution_and_digital_output.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12.7\n",
+"// example 12.7\n",
+"//page 425\n",
+"n=8;//8 bit ADC\n",
+"Vi=5.1;// when all output is 1\n",
+"Res1=2^n;\n",
+"Res2=Vi/(2^n-1);//resolution \n",
+"disp(Res1,Res2)\n",
+"vi=1.28;\n",
+"D=vi/Res2;\n",
+"disp(D)// digital output\n",
+"B=(01000000)// binary equivalent of 64"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.8: quantizing_error.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"// example 12.8\n",
+"//page 426\n",
+"n=12;// 12-bit ADC\n",
+"Vi=4.095;//input voltage\n",
+"Qe=Vi/((2^n-1)*2);// quqntizing error\n",
+"disp(Qe)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 12.9: calculate_t2.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 12\n",
+"// example 12.9\n",
+"// page 428\n",
+"t1=83.33;\n",
+"Vr=100*10^-3;//reference voltage\n",
+"Vi=100*10^-3;\n",
+"t2=(Vi/Vr)*t1;\n",
+"disp(t2)\n",
+"Vi=200*10^-3;\n",
+"t2=(Vi/Vr)*t1;\n",
+"disp(t2)//is in msec"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/2-Operational_amplifier_characteristic.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/2-Operational_amplifier_characteristic.ipynb
new file mode 100644
index 0000000..1500717
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/2-Operational_amplifier_characteristic.ipynb
@@ -0,0 +1,205 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 2: Operational amplifier characteristic"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 2.1: value_of_R1.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chpter 2\n",
+"// example 2.1\n",
+"//page 63, figure 2.16\n",
+"//design the value of R1 if output voltage level required is zero volts.\n",
+"// given\n",
+"Vout=0\n",
+"Vin=6.84\n",
+"Vbe=0.7\n",
+"R2=270\n",
+"//Vin-Vbe-I(R1+R2)=0 applying KVL to base emitter\n",
+"I=(Vin-Vbe)/(R1+R2)\n",
+"Vout=I*R2;\n",
+"R1=1657.8-270; // 0=(6.84-.7)270/(270+R1)\n",
+"disp(R1) // results"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 2.2: input_bais_current_and_input_offset_current.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 2\n",
+"//example 2.2 \n",
+"//page 70\n",
+"Ib1=18*10^-6 ;Ib2=22*10^-6;// given\n",
+"Ib=(Ib1+Ib2)/2 //input base current\n",
+"disp(Ib) //result\n",
+"Iios=(Ib2-Ib1) // input offset current\n",
+"disp(Iios)// result"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 2.3: Compensating_network.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 2\n",
+"//example 2.3 page 76\n",
+"//figure 2.36\n",
+"Vios=8*10^-3;V=12;Vcc=12;Vee=12;//given\n",
+"Rc=10;//let choose Rc less than 100 ohm\n",
+"Rb=(V*Rc)/Vios //Vios=(Rc/Rb)*V\n",
+"Rmax=Rb/10// let choose\n",
+"Ra=Rmax*4;\n",
+"disp(Ra)//thus resistance Ra is potentiometer which can be adjusted till output reaches zero value\n",
+""
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 2.4: Total_output_offset_and_compensating_resistance.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 2\n",
+"//example 2.4 page 79\n",
+"//figure 2.40\n",
+"Vios=12*10^-3; Rf=100*10^3;R1=10*10^3; Ib=500*10^-9;Iios=90*10^-9;//given\n",
+"R3=Rf/R1;R4=R3+1;\n",
+"Voos=Vios*R4+Rf*Ib;\n",
+"disp(Voos)\n",
+"Rcomp=R1*Rf/(R1+Rf);//Rcomp=R1||Rf\n",
+"disp(Rcomp)\n",
+"Voos2=Vios*R4+Rf*Iios;//with Rcomp,the output offset voltage become\n",
+"disp(Voos2)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 2.5: change_in_output_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 2\n",
+"//example 2.5 page 83\n",
+"T=55-25;//chnage in temperature\n",
+"A=150;//gain\n",
+"Vios=.15*10^-3;//input offset voltage shift=chnage in output voltage/change in temp\n",
+"Voos=Vios*T;//Vios=Voos/T\n",
+"disp(Voos)\n",
+"Vout=A*Voos;\n",
+"disp(Vout)\n",
+""
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 2.6: error_voltage_and_output_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 2\n",
+"//example 2.6 page83\n",
+"Rf=100*10^3;R1=1*10^3//given\n",
+"Viovd=14*10^-6;//input offset voltage drift\n",
+"Iiocd=.5*10^-9;//input offset current drift\n",
+"Vin=7*10^-3;\n",
+"T=45-25;//change in tempreture\n",
+"R2=Rf/R1;R3=R2+1;\n",
+"Ev=R3*Viovd*T+Rf*Iiocd*T;//error voltage\n",
+"disp(Ev)\n",
+"A=-Rf/R1;//gain\n",
+"Vout=A*Vin+Ev\n",
+"Vout=A*Vin-Ev"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/3-Basic_application_of_Op_amps.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/3-Basic_application_of_Op_amps.ipynb
new file mode 100644
index 0000000..374d9c2
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/3-Basic_application_of_Op_amps.ipynb
@@ -0,0 +1,540 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 3: Basic application of Op amps"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.11: design_practical_differentiator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"//example 3.11\n",
+"//page 147\n",
+"fa=150;fmax=150;//given\n",
+"C1=1*10^-6;// assuming\n",
+"Rf=1/(fa*2*%pi*C1);//fa=1/2piRfC1\n",
+"disp(Rf)\n",
+"fb=10*fa;// safe frequency\n",
+"disp(fb)\n",
+"R1=1/(2*%pi*fb*C1);//fb=1/2piC1R1\n",
+"disp(R1)\n",
+"Cf=((R1*C1)/Rf);//using R1C1=RfCf\n",
+"disp(Cf)\n",
+"Rcomp=(R1*Rf)/(R1+Rf);//rcomp=R1||Rf\n",
+"disp(Rcomp)// generally Rcomp is selected equal to R1"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.15: scaling_adder_circuit.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"// example 3.15\n",
+"//page 148\n",
+"// Vout=-(3Vin1+4Vin2+5Vin3)\n",
+"Rf=120*10^3;\n",
+"// for inverting summer we have Vout=-(Rf/R1Vin1+Rf/R2Vin2+Rf/R3Vin3)\n",
+"R=Rf/3;//Rf/R1=3 comparing the cofficients\n",
+"disp(R1)\n",
+"R2=Rf/4;\n",
+"disp(R2)\n",
+"R3=Rf/R3;\n",
+"disp(R3)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.16: op_amp_circuit.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"// example 3.16\n",
+"// page 149\n",
+"// Vout=2Vin1-3Vin2+4Vin3-5vin4 \n",
+"Rf1=100*10^3\n",
+"// Vout1=-(Rf1/R1Vin1+Rf1/R3Vin3)\n",
+"R1=Rf1/2;// Rf1/R1=2 comapring the cofficient\n",
+"R3=Rf1/4:\n",
+"disp(R1,R2)\n",
+"Rf2=120*10^3\n",
+"// Vout2=-(Rf2/R2Vin1+Rf2/R4Vin3)\n",
+"R2=Rf2/3;\n",
+"R4=Rf2/5;\n",
+"disp(R2,R4)\n",
+"// output of subtracter is Vout=Vout2-Vout1"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.17: find_ratio_of_Vout_by_Vin.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 3\n",
+"// example 3.17\n",
+"//page 150, figure 3.53\n",
+"Ri=%inf;Ro=0;\n",
+"Aol=%inf;\n",
+"Vb=0;//b is virtually ground\n",
+"Vout=1;// let us assume\n",
+"//input current of op-amp is zeroas R=%inf\n",
+"I1=(Vb-Vout)/100000\n",
+"If2=I1;\n",
+"Va=((10000)/(100000))*(Vb-Vout)\n",
+"//at node A Iin=I1+If1\n",
+"// (Vin-Va)/10*10^3=(Va-Vb)/10*10^3 + (Va-Vo)/100*10^3\n",
+"Vin=Va+(10000)*((Va/10000)+((Va-Vout)/100000));\n",
+"Ratio=Vout/Vin// result ratio of Vout/Vin"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.18: output_voltage_in_term_of_Vin1_and_Vin2.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 3\n",
+"//example 3.18\n",
+"// page 150, figure 3.55\n",
+"Rf=10*10^3;R1=100*10^3;\n",
+"Rf1=100*10^3;R11=10*10^3;\n",
+"Vin1=1;// let suppose\n",
+"Vin2=2\n",
+"Vout1=(1+(Rf/R1))*Vin1;// 1st stage is non inverting amplifier\n",
+"disp(Vout1)\n",
+"// second stage there are two input Vout1 and Vin2 aplly superposition theorem\n",
+"Vout2=-(Rf1/R11)*Vout1;\n",
+"//with Vout1 grounded,Vin2 active ,it behave as non-inverting amplifier\n",
+"Vout3=(1+(Rf1/R11))*Vin2;\n",
+"Vout=Vout2+Vout3;\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.19: range_of_gain.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 3\n",
+"//example 3.19\n",
+"//page 163, figure 3.73\n",
+"R1=200;R2=100;Rf=100*10^3;//given\n",
+"Rg1=100+0;//potentiometer resistance is 0 at start\n",
+"gain1=((1+2*(Rf/Rg1))*(R2/R1));\n",
+"Rg2=100+100*10^3;//potentiometer maximum value\n",
+"gain2=((1+2*(Rf/Rg2))*(R2/R1));\n",
+"disp(gain1,gain2)// range of gain"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.1: voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chpater 3\n",
+"// example 3.1\n",
+"//page 106, figure 3.3\n",
+"R1=10000;Rf=47000;//given\n",
+"Af=-(Rf/R1);// voltage gain Af=Vout/Vin\n",
+"disp(Af)//negative sign indicate phase shift between input and output"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.20: Value_of_Rg.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 3\n",
+"// example 3.20\n",
+"//page 164,figure 3.74\n",
+"R1=100*10^3;R2=100*10^3;Rf=470;//given\n",
+"// gain=(1+2Rf/Rg)(R2/R1)\n",
+"gain=100;//given\n",
+"Rg=(((gain/(R2/R1))-1)\(2*Rf));\n",
+"disp(Rg)//result for Rg so that gain is 100"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.21: transduer_resistance.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"//example 3.21\n",
+"//page 167\n",
+"Ro=100;\n",
+"x=0.00392;\n",
+"T1=25;//temp at 25c\n",
+"R(25)=Ro*(1+(x*T1));\n",
+"disp(R(25))// resistance at 25 degree\n",
+"T2=100;\n",
+"R(100)=Ro*(1+(x*T2));\n",
+"disp(R(100))//resistance at 100 degree"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.2: value_of_Rf.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"//example 3.2\n",
+"//page 107\n",
+"R1=4700;\n",
+"Af=-60;\n",
+"Rf=Af*R1//voltage gain Af=-Rf/R1\n",
+"disp(Rf)//result"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.3: voltage_gain_ip_and_op_resistance_bandwidth.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"// example 3.3\n",
+"//page 112\n",
+"A=2*10^5;//open loop gain\n",
+"Rin=2*10^6;// input resistnace\n",
+"Ro=75;// output resistance\n",
+"Fo=5;// single break frequency in herzt\n",
+"R1=470;Rf=4700;\n",
+"K=Rf/(Rf+R1)\n",
+"B=R1/(R1+Rf)\n",
+"Af=-(A*Rf)/(R1+Rf+R1*A);//close loop gain\n",
+"Rinf=R1+(Rf*Rin)/(Rf+Rin+A*Rin);\n",
+"disp(Rinf)//close loop resistance\n",
+"Rof=Ro/(1+A*B);//close loop output resistance\n",
+"disp(Rof)//output resistance\n",
+"Ff=Fo*(1+A*B);\n",
+"disp(Ff)//bandwidth with feedback"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.4: feedback_resistance_Rf.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"// example 3.4\n",
+"//page 114,figure 3.9\n",
+"R1=1000;\n",
+"Af=61;//closed loop gain\n",
+"Rf=R1*(61-1);//Af=1+(Rf/R1)\n",
+"disp(Rf)//feedback resistance"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.5: close_loop_gain_ip_and_op_resistance_and_bandwidth.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"//example 3.5\n",
+"//page 120,\n",
+"A=2*10^5;//open loop gain\n",
+"R1=1000;Rf=10000;\n",
+"Ri=2*10^6;//input resistance\n",
+"Ro=75;//output resistance\n",
+"Fo=5;// single break frequency in Hz\n",
+"B=R1/(R1+Rf)\n",
+"Af=A/(1+A*B);//gain\n",
+"disp(Af)// closed loop gain\n",
+"Rif=Ri*(1+A*B);// closed loop input resistance\n",
+"disp(Rif)\n",
+"Rof=Ro/(1+A*B);\n",
+"disp(Rof)// colsed loop output resistance\n",
+"Fof=Fo*(1+A*B);\n",
+"disp(Fof)// colsed loop bandwidth in Hz"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.6: output_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"// exmaple 3.6\n",
+"//page 124 , figure 3.17\n",
+"R1=1*10^3;R2=R1;R3=R1;//given\n",
+"Rf=1*10^3;//given\n",
+"Vin1=2;Vin2=1;Vin3=4;//given\n",
+"Vout=-((Rf/R1)*Vin1+(Rf/R2)*Vin2+(Rf/R3)*Vin3);\n",
+"disp(Vout)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.7: practical_integrator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 3\n",
+"// example 3.7\n",
+"//page 135\n",
+"A=10;//d.c gain\n",
+"R1=10000;\n",
+"F=10000;//input frequency\n",
+"CfRf=15915*10^-4;\n",
+"Fa=F/A;\n",
+"Rf=10*R1;// A=Rf/R1\n",
+"//Fa=1/(2*3.14*Rf*Cf)\n",
+"Cf=15915*10^-4/Rf;\n",
+"disp(Cf)\n",
+"Rcomp=(R1*Rf)/(R1+Rf);\n",
+"disp(Rcomp)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.8: maximum_change_in_output_voltage_and_slew_rate.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"//example 3.8\n",
+"//page 136, figure 3.35\n",
+"F=1000;\n",
+"R1=1000;Cf=.1*10^-6;\n",
+"Vin=5;//voltage in V\n",
+"T=1/F;//time period\n",
+"disp(T)// in second\n",
+"Vout=(Vin*T)/(2*R1*Cf);// change in output voltage \n",
+"disp(Vout)//given saturation level is 14V hence output will not saturate will be triangular in nature\n",
+"S=2*%pi*F*Vin;// slew rate \n",
+"disp(S)//minimum slew rate"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 3.9: safe_frequency_DC_gain.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 3\n",
+"//example 3.9\n",
+"//page 137\n",
+"R1=120*10^3;Rf=1.2*10^6;Cf=10*10^-9// given\n",
+"fa=1/(2*%pi*Rf*Cf);// corner frequency\n",
+"F=10*10^3;\n",
+"Vin=5;\n",
+"disp(fa)//coner frequency\n",
+"safefrequency=10*fa//safe frequency is 10 times of corner frequency\n",
+"Adc=Rf/R1;//D.C gain\n",
+"Adb=20*log10(Adc)// gain in db\n",
+"A=(Rf/R1)/sqrt(1+(F/fa)^2)//gain for practical intregrater circuit\n",
+"disp(A)\n",
+"Vout=A*Vin;//|A|=Vout(peak)/Vin(peak)\n",
+"disp(Vout)"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/4-Non_linear_application_of_op_amps.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/4-Non_linear_application_of_op_amps.ipynb
new file mode 100644
index 0000000..63eae6a
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/4-Non_linear_application_of_op_amps.ipynb
@@ -0,0 +1,177 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 4: Non linear application of op amps"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 4.1: threshold_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 4\n",
+"//example 4.1\n",
+"// page 193 ,figure 4.20\n",
+"R1=120;R2=51*10^3;//given\n",
+"Vsat=15;Vcc=15;Vee=15;Vin=1;//given\n",
+"Vut=((Vsat*R1)/(R1+R2));\n",
+"disp(Vut)//result threshold in ampere\n",
+"Vult=((-Vsat*R1)/(R1+R2));\n",
+"disp(Vult)//ampere"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 4.2: Calculate_value_of_R1_and_R2.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 4\n",
+"//example 4.2\n",
+"//page 193,figure 4.21\n",
+"Vsat=12;Vh=6;\n",
+"// Vh=(R1/R1+R2)(Vsat-(-Vsat))\n",
+"R1=10000;// let assume\n",
+"x=(Vh/(Vsat-(-Vsat)));\n",
+"disp(x)\n",
+"R2=((1-.25)*R1)/.25\n",
+"disp(R2,R1)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 4.3: time_duratio.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 4\n",
+"// example 4.3\n",
+"// page 194\n",
+"Vp_p=5;//peak to peak volatage of sine wave\n",
+"Vlt=-1.5;//lower threshold level\n",
+"Vh=2;// hysteresis width\n",
+"f=1000;\n",
+"Vut=Vh-(-Vlt);\n",
+"disp(Vut)\n",
+"Vm=Vp_p/2;\n",
+"disp(Vm)\n",
+"//Vlt=Vm*sin(%pi+x)\n",
+"x=36.87;// taking sin invers\n",
+"T=1/f;\n",
+"disp(T)\n",
+"T1=(T*(180+x))/360;//T1 exist for angle 0 to (180+36.87)\n",
+"disp(T1)\n",
+"T2=T-T1;//t2 exist for angle 216.87 to 360\n",
+"disp(T2)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 4.4: calculate_Vlt_Vut_and_Vh.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 4\n",
+"//example 4.4\n",
+"//page 196\n",
+"Vsat=12;\n",
+"R1=1000;R2=3000;//given\n",
+"Vlt=(-(+Vsat)*R1)/R2;\n",
+"disp(Vlt)// lower threshold\n",
+"Vut=(-(-Vsat)*R1)/R2;//upper threshold\n",
+"disp(Vut)\n",
+"Vh=(R1/R2)*(Vsat-(-Vsat));//hysteresis width\n",
+"disp(Vh)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 4.5: change_in_output_voltage.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 4\n",
+"// example 4.5\n",
+"//page 220\n",
+"Vin=5;\n",
+"FRR=80;\n",
+"Vout=Vin/10^4*log10(10);// FRR=20log(Vin/Vout)\n",
+"disp(Vout);//change in output voltage"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/6-Operational_Transconductance_Amplefier.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/6-Operational_Transconductance_Amplefier.ipynb
new file mode 100644
index 0000000..687989a
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/6-Operational_Transconductance_Amplefier.ipynb
@@ -0,0 +1,56 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 6: Operational Transconductance Amplefier"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 6.1: calculate_frequency.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 6\n",
+"// example 6.1\n",
+"//page 246\n",
+"Gm=55*10^-6;\n",
+"C=8.75*10^-12;\n",
+"Fh=Gm/(2*3.14*C);//Fh=f-3db\n",
+"disp(Fh)//result"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/7-waveform_generator.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/7-waveform_generator.ipynb
new file mode 100644
index 0000000..9a1441f
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/7-waveform_generator.ipynb
@@ -0,0 +1,243 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 7: waveform generator"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.1: calculate_Vlt_Vut_and_frequency_of_oscillation.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 7\n",
+"//example 7.1\n",
+"//page 259\n",
+"R1=86*10^3;R2=100*10^3;\n",
+"Vsat=15;Rf=100*10^3;\n",
+"C=.1*10^-6;\n",
+"Vut=(R1*Vsat)/(R1+R2);\n",
+"disp(Vut)// upper threshold\n",
+"Vlt=(R1*(-Vsat))/(R1+R2);\n",
+"disp(Vlt)//lower threshold\n",
+"fo=1/(2*Rf*C)*log((Vsat-Vlt)/(Vsat-Vut));\n",
+"disp(fo)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.2: T_equal_to_2RfC.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter7\n",
+"// example 7.2\n",
+"//page 259\n",
+"R2=%s\n",
+"R1=.86*R2\n",
+"Vsat=%s\n",
+"Rf=%s;\n",
+"C=%s;\n",
+"y=(Vsat-(R1*(-Vsat))/(R1+R2))/(Vsat-(R1*Vsat)/(R1+R2))\n",
+"g=2.72;//g=y=5.0592/1.86\n",
+"T=2*Rf*C*log(g)// Rf=C=%s\n",
+"disp(T)// %s*%s=s same as 2*Rf*C=2s"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.3: frequency_of_oscillation.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 7\n",
+"// example 7.3\n",
+"// page 276\n",
+"R3=6000;R4=2000;//given\n",
+"R=5100;\n",
+"C=.001*10^-6;\n",
+"A=1+(R3/R4);\n",
+"if A>3 then \n",
+" f=1/(2*3.14*R*C)\n",
+" disp(f)//frequency of oscillation\n",
+" end \n",
+" "
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.4: wien_bridge_oscillator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 7\n",
+"//example 7.4\n",
+"//page 277\n",
+"C=.05*10^-6;// let choose capacitor C<1uf\n",
+"C1=C;C2=C;\n",
+"f=1000;\n",
+"R=1/(2*3.14*f*C);\n",
+"disp(R)\n",
+"//for proper operation gain of non inverting op-amp must be 3\n",
+"R4=%s\n",
+"R3=R4*(3-1);//1+R3/R4=3\n",
+"disp(R3)\n",
+"R4=10000;// assume\n",
+"R3=2*R4\n",
+"disp(R3,R4)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.5: triangular_waveform.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 7\n",
+"//example 7.5\n",
+"// page 280\n",
+"Vsat=15;\n",
+"Vout=7.5;\n",
+"fo=5000;\n",
+"R2=10*10^3;//let assume (use a 50k POT)\n",
+"R3=(2*Vsat*R2)/Vout;\n",
+"disp(R3)\n",
+"C=.01*10^-6;//let assume\n",
+"R1=R3/(4*C*R2*fo);//fo=R3/4R1C1R2\n",
+"disp(R1)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.6: output_frequency.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 7\n",
+"//example 7.6\n",
+"//page 285, figure 7.40\n",
+"R1=10000;R2=5100;R3=10000;\n",
+"C1=.001*10^-6;\n",
+"V=10;\n",
+"V5=(V*R3)/(R3+R2);\n",
+"disp(V5)\n",
+"fo=2.4*(V-V5)/(R1*C1*V);\n",
+"disp(fo)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 7.7: monoshot_using_741.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 7\n",
+"//example 7.7\n",
+"// page 286,figure 7.42\n",
+"R1=10000;R2=10000;\n",
+"Vd1=.7;//diode drop\n",
+"Vsat=12;//supply voltage\n",
+"TP=2*10^-6;\n",
+"C=.5*10^-9;\n",
+"B=R1/(R1+R2)\n",
+"//T=RCln((1+Vd1/Vsat)/(1-B))\n",
+"k=((1+(Vd1/Vsat))/(1-B))\n",
+"h=log(k)\n",
+"R=TP/(C*h)"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/8-Timer_IC_and_Application.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/8-Timer_IC_and_Application.ipynb
new file mode 100644
index 0000000..0e4c062
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/8-Timer_IC_and_Application.ipynb
@@ -0,0 +1,234 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 8: Timer IC and Application"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.1: output_pulse_width.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"// chapter 8\n",
+"//example 8.1\n",
+"//page 293\n",
+"R=10*10^3;C=.1*10^-6;// given \n",
+"t=1.1*R*C;//output pulse width\n",
+"disp(t)//pulse widht in sec"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.2: output_frequency_and_duty_cycle.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 8\n",
+"//example 8.2\n",
+"//page 298\n",
+"R1=4*10^3;R2=4*10^3;// given for 555 timer\n",
+"C=.01*10^-6;//for 555 timer\n",
+"f=1.44/((R1+2*R2)*C);\n",
+"disp(f)//frequency of output in Hz\n",
+"D=(R1+R2)/(R1+2*R2);\n",
+"disp(D)//duty cycle\n",
+"percentage=D*100"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.3: timer.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter8\n",
+"//example 8.3\n",
+"//page300\n",
+"Ton=5;//given\n",
+"C=10*10^-6;//let assume\n",
+"R=Ton/(1.1*C);//using Ton=1.1RC\n",
+"disp(R)//this not standard value but we can adjust by connecting variable resistance"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.4: design_an_astable_multivibrator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 8\n",
+"//example 8.4\n",
+"//page 301\n",
+"Toff=1;Ton=3;//given\n",
+"C=10*10^-6;//choosing \n",
+"R2=Toff/(.693*C);//using eq Toff=.693RC\n",
+"disp(R2)//resistance\n",
+"//Ton=.693(R1+R2)C\n",
+"R1=(Ton/(.693*C))-R2;\n",
+"disp(R1)//required resistance"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.5: circuit_desig.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter8\n",
+"//example8.5\n",
+"//page301\n",
+"T=10*10^-3;//for proper operation of LED which remain ON for 10msec\n",
+"C=.22*10^-6//choose\n",
+"Vcc=15;Vbe=.7;Vcesat=.2;//given\n",
+"Vled=1.4;Iled=20*10^-3;\n",
+"//T=1.1RC\n",
+"R=T/(1.1*C);\n",
+"disp(R)\n",
+"Vo=Vcc-2*Vbe-Vcesat;//output of timer\n",
+"disp(Vo)\n",
+"Rled=(Vo-Vled)/Iled;\n",
+"disp(Rled)//this resistance must be in series whit LED\n",
+"f=1000;D=95;//for an astable timer\n",
+"C1=.01*10^-6;\n",
+"R1=%s;R2=%s;\n",
+"f=1.44/(R1+2*R2)*C;//frequency--------------eq(1)\n",
+"D=(R1+R2)/(R1+2*R2)//duty cycle-------------eq(2)\n",
+"R2=.0555*R1;//from eq(2)\n",
+"//put it in eq(1)\n",
+"R1=144*10^3/(1+2*.0555);\n",
+"disp(R1)\n",
+"R2=.0555*R1;\n",
+"disp(R2)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.6: Monostable_multivibrator.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 8\n",
+"//example 8.6\n",
+"//page 302\n",
+"T=5*10^-3;\n",
+"C=.1*10^-6;\n",
+"//T=1.1RC\n",
+"R=T/(1.1*C);\n",
+"disp(R)//value of R should be less than 100k as obtain above"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 8.7: 555_based_square_wave_generater.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter8\n",
+"//example8.7\n",
+"//page 303\n",
+"f=1000;\n",
+"T=1/f\n",
+"Td=T/2\n",
+"C=.1*10^-6;\n",
+"//Td=.69R2C\n",
+"R2=Td/(.69*C);\n",
+"disp(R2)\n",
+"R1=R2//for square wave R1=R2"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
diff --git a/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/9-Active_filter.ipynb b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/9-Active_filter.ipynb
new file mode 100644
index 0000000..7a4cbde
--- /dev/null
+++ b/Op_Amps_and_Linear_Integrated_Circuit_by_S_Sharma/9-Active_filter.ipynb
@@ -0,0 +1,218 @@
+{
+"cells": [
+ {
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "# Chapter 9: Active filter"
+ ]
+ },
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 9.1: cut_off_frequency.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 9\n",
+"//example 9.1\n",
+"//page 323\n",
+"R=10*10^3;C=.001*10^-6;\n",
+"Rf=100*10^3;R1=10*10^3;\n",
+"fc=1/(2*3.14*R*C);//cut off frequency\n",
+"disp(fc)\n",
+"Ao=1+(Rf/R1);//pass band voltage gain\n",
+"disp(Ao)//pass band voltage gain"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 9.2: first_order_low_pass_filter.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 9\n",
+"//example 9.2\n",
+"//page 324\n",
+"Ao=2;fc=10*10^3;\n",
+"Rf=10*10^3;//let choose\n",
+"//Ao=1+(RF/R1)\n",
+"R1=Rf/(Ao-1);\n",
+"disp(R1)\n",
+"C=.001*10^-6;\n",
+"R=1/(2*3.14*fc*C);\n",
+"disp(R)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 9.3: second_order_low_pass_filter.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter9\n",
+"//example9.3\n",
+"//page327\n",
+"fc=1000;\n",
+"C2=.005*10^-6;R1=33*10^3;//let assume\n",
+"C3=C2;C=C2;\n",
+"R3=1/(2*3.14*fc*C);\n",
+"disp(R3)\n",
+"R2=R3\n",
+"Rf=.586*R1;\n",
+"disp(Rf)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 9.4: cutoff_frequency_and_pass_band_voltage_gain.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter9\n",
+"//example9.4\n",
+"//page327\n",
+"R1=12*10^3;Rf=7*10^3;R2=33*10^3;R3=33*10^3;R=33*10^3;\n",
+"C3=.002*10^-6;C2=.002*10^-6;C=.002*10^-6;\n",
+"fc=1/2*3.14*sqrt(R2*R3*C2*C3);\n",
+"disp(fc)//cut off frequency\n",
+"Af=1+(Rf/R1);//passband voltage gain(Avf)\n",
+"disp(Af)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 9.5: butterworth_low_pass_filter.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter9\n",
+"//example9.5\n",
+"//page333\n",
+"fc=1.5*10^3;\n",
+"Ri=1;\n",
+"x=sqrt(2);\n",
+"Rf=(2-x);//for equal component model\n",
+"disp(Rf)\n",
+"Af=1+(Rf/Ri);//pass band gain of equal component model\n",
+"Wc=2*3.14*fc;\n",
+"C=1;\n",
+"R=1/(Wc*C);\n",
+"disp(R)\n",
+"R1=R;R2=R;\n",
+"R1=R*10^7;R2=R*10^7;//to increase R reasonable value we multiply R1 nad R2 by 10^7\n",
+"disp(R1,R2)\n",
+"C1=C*10^-7;C2=C*10^-7;//in order to keep value of fc unchanged we have to decrease C1 and C2 by same factor\n",
+"disp(C1,C2)"
+ ]
+ }
+,
+{
+ "cell_type": "markdown",
+ "metadata": {},
+ "source": [
+ "## Example 9.6: second_order_butterworth_filter.sce"
+ ]
+ },
+ {
+"cell_type": "code",
+ "execution_count": null,
+ "metadata": {
+ "collapsed": true
+ },
+ "outputs": [],
+"source": [
+"//chapter 9\n",
+"//example9.6\n",
+"//page 335\n",
+"fc=1.5*10^3;\n",
+"x=1.414;//damping factor\n",
+"C1=2/x;\n",
+"disp(C1)\n",
+"C2=x/2;\n",
+"disp(C2)\n",
+"R1=1;R2=1;\n",
+"Rf=2;\n",
+"Wc=1;\n",
+"Wc=2*3.14*fc;\n",
+"disp(Wc)\n",
+"R=R1/Wc;//to keep C1 nad C2 unchanged\n",
+"disp(R)\n",
+"Rf=2*R\n",
+"R1=R*10^7;R2=R*10^7;//for maiking filter for practical use\n",
+"disp(R1,R2)\n",
+"C1=C1*10^-7;C2=C2*10^-7;//to fc remain unchanged\n",
+"disp(C1,C2)"
+ ]
+ }
+],
+"metadata": {
+ "kernelspec": {
+ "display_name": "Scilab",
+ "language": "scilab",
+ "name": "scilab"
+ },
+ "language_info": {
+ "file_extension": ".sce",
+ "help_links": [
+ {
+ "text": "MetaKernel Magics",
+ "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+ }
+ ],
+ "mimetype": "text/x-octave",
+ "name": "scilab",
+ "version": "0.7.1"
+ }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 0
+}
generated by cgit (git 2.34.1) at 2025-03-11 08:28:10 +0000