1 files changed, 105 insertions, 0 deletions
diff --git a/Electronic_Devices_by_T_L_Floyd/1-semiconductor_basics.ipynb b/Electronic_Devices_by_T_L_Floyd/1-semiconductor_basics.ipynb
new file mode 100644
index 0000000..7388cd6
--- /dev/null
+++ b/Electronic_Devices_by_T_L_Floyd/1-semiconductor_basics.ipynb
@@ -0,0 +1,105 @@
+{
+"cells": [
+ {
+		   "cell_type": "markdown",
+	   "metadata": {},
+	   "source": [
+       "# Chapter 1: semiconductor basics"
+	   ]
+	},
+{
+		   "cell_type": "markdown",
+		   "metadata": {},
+		   "source": [
+			"## Example 1.1: Different_diode_models.sce"
+		   ]
+		  },
+  {
+"cell_type": "code",
+	   "execution_count": null,
+	   "metadata": {
+	    "collapsed": true
+	   },
+	   "outputs": [],
+"source": [
+"//Ex-1.1(a)\n",
+"V_bias=10;\n",
+"R_limit=1000;\n",
+"r_d =10;\n",
+"//Voltages in Volts, Currents in Amperes, Resistances in Ohms\n",
+"//IDEAL MODEL\n",
+"disp('IDEAL MODEL')\n",
+"V_f=0;\n",
+"I_f=V_bias/R_limit;\n",
+"V_R_limit=I_f*R_limit;\n",
+"disp(V_f,'forward voltage in volts');\n",
+"disp(I_f,'forward current in amperes');\n",
+"disp(V_R_limit,'voltage across limiting resistor in volts');\n",
+"//PRACTICAL MODEL\n",
+"disp('PRACTICAL MODEL');\n",
+"V_f=0.7;\n",
+"I_f=(V_bias-V_f)/R_limit;\n",
+"V_R_limit=I_f*R_limit;\n",
+"disp(V_f,'forward voltage in volts');\n",
+"disp(I_f,'forward current in amperes');\n",
+"disp(V_R_limit,'voltage across limiting resistor in volts');\n",
+"//COMPLETE MODEL\n",
+"disp('COMPLETE MODEL')\n",
+"I_f=(V_bias-0.7)/(R_limit+r_d');\n",
+"V_f=0.7+I_f*r_d';\n",
+"V_R_limit=I_f*R_limit;\n",
+"disp(V_f,'forward voltage in volts');\n",
+"disp(I_f,'forward current in amperes');\n",
+"disp(V_R_limit,'voltage across limiting resistor in volts');\n",
+"//Ex1.1(b)\n",
+"V_bias=5;\n",
+"I_R=1*10^-6;\n",
+"//IDEAL MODEL\n",
+"disp('IDEAL MODEL');\n",
+"I_r=0;\n",
+"V_R=V_bias;\n",
+"V_R_limit=I_r*R_limit;\n",
+"disp(I_r,'reverse current in amperes')\n",
+"disp(V_R,'reverse voltage in volts')\n",
+"disp(V_R_limit,'voltage across limiting resistor in volts')\n",
+"//PRACTICAL MODEL\n",
+"disp('PRACTICAL MODEL')\n",
+"I_r=0;\n",
+"V_R=V_bias;\n",
+"V_R_limit=I_r*R_limit;\n",
+"disp(I_r,'reverse current in amperes')\n",
+"disp(V_R,'reverse voltage in volts')\n",
+"disp(V_R_limit,'voltage across limiting resistor in volts')\n",
+"//COMPLETE MODEL\n",
+"disp('COMPLETE MODEL')\n",
+"I_r=I_R;\n",
+"V_R_limit=I_r*R_limit;\n",
+"V_R=V_bias-V_R_limit;\n",
+"disp(I_r,'reverse current in amperes')\n",
+"disp(V_R,'reverse voltage in volts')\n",
+"disp(V_R_limit,'voltage across limiting resistor in volts')"
+   ]
+   }
+],
+"metadata": {
+		  "kernelspec": {
+		   "display_name": "Scilab",
+		   "language": "scilab",
+		   "name": "scilab"
+		  },
+		  "language_info": {
+		   "file_extension": ".sce",
+		   "help_links": [
+			{
+			 "text": "MetaKernel Magics",
+			 "url": "https://github.com/calysto/metakernel/blob/master/metakernel/magics/README.md"
+			}
+		   ],
+		   "mimetype": "text/x-octave",
+		   "name": "scilab",
+		   "version": "0.7.1"
+		  }
+		 },
+		 "nbformat": 4,
+		 "nbformat_minor": 0
+}