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/* Copyright (C) 2016 - IIT Bombay - FOSSEE
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/* Copyright (C) 2016 - IIT Bombay - FOSSEE
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This file must be used under the terms of the CeCILL.
This source file is licensed as described in the file COPYING, which
you should have received as part of this distribution. The terms
are also available at
http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
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Author: Jorawar Singh, Siddhesh Wani
Organization: FOSSEE, IIT Bombay
Email: toolbox@scilab.in
*/
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Author: Siddhesh Wani
Organization: FOSSEE, IIT Bombay
Email: toolbox@scilab.in
*/
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#ifndef __INT_RPIPERIPHERALPWM_H__
#define __INT_RPIPERIPHERALPWM_H__
#include "types.h"
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#include "RPIPeripheralPWM.h"
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#ifdef __cplusplus
extern "C" {
#endif
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#define u80u160RPI_pwmWrite(pin,value) u8RPI_pwmWrites(pin,value);
#define u320RPI_pwmRange(value) u32RPI_pwmRanges(value);
#define g2RPI_pwmMode(mode) gRPI_pwmModea(mode);
#define u160RPI_pwmClock(divisor) u16RPI_pwmClocks(divisor);
#define u80u160RPI_pwmToneWrite(pin,value) u8RPI_pwmToneWrites(pin,value);
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#define RPI_HardPWMWrite(pin,value) u8RPIHardPWMWrites((uint8)pin,(uint16)value)
#define RPI_HardPWMSetRange(value) u8RPIHardPWMSetRanges((uint16)value)
#define RPI_HardPWMSetMode(mode) u8RPIHardPWMSetModes((uint8)mode)
#define RPI_HardPWMSetClock(clk_divisor) u8RPIHardPWMSetClocks((uint16)clk_divisor)
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#ifdef __cplusplus
} /* extern "C" */
#endif
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#endif /* !__INT_RPIPERIPHERALPWM_H__ */
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#endif /*__INT_RPIPERIPHERALPWM_H__*/
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