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authorsiddhu89902017-06-21 15:18:15 +0530
committersiddhu89902017-06-21 15:18:15 +0530
commitadbc46709966e50b3fed6ff061afff9e59d4b79c (patch)
treec0a375b9c280a878e451d06f9cac2e90a433165d /src/c/signalProcessing/interfaces
parent240e5e93815eef0992834ec7bd2a8162acca13f0 (diff)
parent18f7cf96174799b674115e43f108423fa5d0fc9c (diff)
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Merged Ukasha's work, code generation for control loop changed
Diffstat (limited to 'src/c/signalProcessing/interfaces')
-rw-r--r--src/c/signalProcessing/interfaces/int_dct.h32
-rw-r--r--src/c/signalProcessing/interfaces/int_idct.h26
-rw-r--r--src/c/signalProcessing/interfaces/int_modk.h18
3 files changed, 76 insertions, 0 deletions
diff --git a/src/c/signalProcessing/interfaces/int_dct.h b/src/c/signalProcessing/interfaces/int_dct.h
new file mode 100644
index 0000000..6cfb21c
--- /dev/null
+++ b/src/c/signalProcessing/interfaces/int_dct.h
@@ -0,0 +1,32 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ukasha Noor
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+
+
+
+#ifndef __INT_DCT_H__
+#define __INT_DCT_H__
+
+
+
+#define d2dctd2(in,size,out) ddcta(in,size[0],size[1],-1,out)
+
+#define d2d0dctd2(in,size,sign,out) ddcta(in,size[0],size[1],sign,out)
+
+#define z2dctz2(in,size,out) zdcta(in,size[0],size[1],-1,out)
+
+#define z2d0dctz2(in,size,sign,out) zdcta(in,size[0],size[1],sign,out)
+
+#define c2dctc2(in,size,out) cdcta(in,size[0],size[1],-1,out)
+
+#define c2s0dctc2(in,size,sign,out) cdcta(in,size[0],size[1],sign,out)
+
+#endif
diff --git a/src/c/signalProcessing/interfaces/int_idct.h b/src/c/signalProcessing/interfaces/int_idct.h
new file mode 100644
index 0000000..c3a174a
--- /dev/null
+++ b/src/c/signalProcessing/interfaces/int_idct.h
@@ -0,0 +1,26 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ukasha Noor
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+
+
+
+#ifndef __INT_IDCT_H__
+#define __INT_IDCT_H__
+
+
+
+#define d2idctd2(in,size,out) didcta(in,size[0],size[1],out)
+
+#define z2idctz2(in,size,out) zidcta(in,size[0],size[1],out)
+
+#define c2idctc2(in,size,out) cidcta(in,size[0],size[1],out)
+
+#endif
diff --git a/src/c/signalProcessing/interfaces/int_modk.h b/src/c/signalProcessing/interfaces/int_modk.h
new file mode 100644
index 0000000..441b9b1
--- /dev/null
+++ b/src/c/signalProcessing/interfaces/int_modk.h
@@ -0,0 +1,18 @@
+/* Copyright (C) 2017 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ankit Raj
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+ */
+
+#ifndef __INT_MODK_H__
+#define __INT_MODK_H__
+
+#define d2modkd2(inp,size,oup) dmodka(inp,size[1],oup)
+
+#endif /* !INT_MODK_H__! */