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| author | ukashanoor | 2017-06-21 12:15:47 +0530 |
|---|---|---|
| committer | ukashanoor | 2017-06-21 12:15:47 +0530 |
| commit | 18f7cf96174799b674115e43f108423fa5d0fc9c (patch) | |
| tree | ab0d0ac7a349986cf95556b7c1975748cbfb8ec1 /src/c/scilab-arduino/sleep | |
| parent | 785e19f097f7ca1964edaf159c9adfe2eda733b5 (diff) | |
| parent | e92d6c6791aae06053637ad3bf6b0f9d8986986c (diff) | |
| download | Scilab2C_fossee_old-18f7cf96174799b674115e43f108423fa5d0fc9c.tar.gz Scilab2C_fossee_old-18f7cf96174799b674115e43f108423fa5d0fc9c.tar.bz2 Scilab2C_fossee_old-18f7cf96174799b674115e43f108423fa5d0fc9c.zip | |
updated with main repo
Diffstat (limited to 'src/c/scilab-arduino/sleep')
| -rw-r--r-- | src/c/scilab-arduino/sleep/u16sleeps.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/c/scilab-arduino/sleep/u16sleeps.c b/src/c/scilab-arduino/sleep/u16sleeps.c index 88f8a66..3045978 100644 --- a/src/c/scilab-arduino/sleep/u16sleeps.c +++ b/src/c/scilab-arduino/sleep/u16sleeps.c @@ -6,11 +6,13 @@ are also available at http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt Author: Siddhesh Wani + Revised by: Yash Pratap Singh Tomar Organization: FOSSEE, IIT Bombay Email: toolbox@scilab.in */ #include "sleep.h" +#include "Arduino.h" void u16sleeps(uint16 delay_ms) { |