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author | yash1112 | 2017-07-07 21:20:49 +0530 |
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committer | yash1112 | 2017-07-07 21:20:49 +0530 |
commit | 3f52712f806fbd80d66dfdcaff401e5cf94dcca4 (patch) | |
tree | a8333b8187cb44b505b9fe37fc9a7ac8a1711c10 /src/c/hardware/rasberrypi/pwm/u8RPIHardPWMSetClocks.c | |
download | Scilab2C_fossee_old-3f52712f806fbd80d66dfdcaff401e5cf94dcca4.tar.gz Scilab2C_fossee_old-3f52712f806fbd80d66dfdcaff401e5cf94dcca4.tar.bz2 Scilab2C_fossee_old-3f52712f806fbd80d66dfdcaff401e5cf94dcca4.zip |
sci2c arduino updated
Diffstat (limited to 'src/c/hardware/rasberrypi/pwm/u8RPIHardPWMSetClocks.c')
-rw-r--r-- | src/c/hardware/rasberrypi/pwm/u8RPIHardPWMSetClocks.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/c/hardware/rasberrypi/pwm/u8RPIHardPWMSetClocks.c b/src/c/hardware/rasberrypi/pwm/u8RPIHardPWMSetClocks.c new file mode 100644 index 0000000..d06b135 --- /dev/null +++ b/src/c/hardware/rasberrypi/pwm/u8RPIHardPWMSetClocks.c @@ -0,0 +1,27 @@ +/* Copyright (C) 2016 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Siddhesh Wani + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in +*/ + +/*Function to set clock for pwm channel. Default clock is 19.2 MHz. 'clk_divisor' + along with range decides frequency for PWM + PWM frequency = 19.2 MHz / clk_divisor/ range + Range for clk_divisor = 1-2048 + */ + +#include "types.h" +#include "RPIPeripheralPWM.h" + +void u8RPIHardPWMSetClocks(uint16 clk_divisor) +{ + pwmSetClock(clk_divisor); + + +} |