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authorsiddhu89902017-04-19 14:28:34 +0530
committersiddhu89902017-04-19 14:28:34 +0530
commit9e506f48291533cba7b4c555b0d2e98f234bfbe3 (patch)
tree6ffe38eefea51cdb767493850b2ada0c098fe416 /src/c/hardware/avr/pwm
parent453598b49cb3d4a62b1797dbc90f0e3dd4521329 (diff)
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Merged Ashish's work
Diffstat (limited to 'src/c/hardware/avr/pwm')
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c24
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWM0Setups.c50
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c31
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWM1Setups.c69
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c22
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWM2Setups.c47
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWMSetDutys.c39
-rw-r--r--src/c/hardware/avr/pwm/u8AVRPWMSetups.c60
8 files changed, 243 insertions, 99 deletions
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c b/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c
new file mode 100644
index 0000000..106a872
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c
@@ -0,0 +1,24 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+//Function to Set Duty cycle of PWM Output generated by Timer0 at OC0 pin.
+
+
+#include "AVRPeripheralPWM.h"
+
+uint8 u8AVRPWM0SetDutys(uint8 duty)
+{
+ uint8 duty_value = 0;
+ duty_value = (((uint16)(duty * 0xff))/100);
+ OCR0 = duty_value;
+ return 0;
+}
+
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM0Setups.c b/src/c/hardware/avr/pwm/u8AVRPWM0Setups.c
new file mode 100644
index 0000000..131ee68
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM0Setups.c
@@ -0,0 +1,50 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+//Function to Setup PWM output for OC0 pin.
+
+
+#include "AVRPeripheralPWM.h"
+
+
+uint8 u8AVRPWM0Setups(uint8 waveform_mode, uint8 output_mode)
+{
+ switch(waveform_mode)
+ {
+ case 0:
+ TCCR0 |= (1<<WGM00);
+ break;
+
+ case 1:
+ TCCR0 |= (1<<WGM00)|(1<<WGM01);
+ break;
+
+ case 2:
+ TCCR0 |= (1<<WGM01);
+ break;
+ }
+ switch(output_mode)
+ {
+ case 0:
+ TCCR0 |= (1<<COM01);
+ break;
+
+ case 1:
+ TCCR0 |= (1<<COM00)|(1<<COM01);
+ break;
+
+ case 2:
+ TCCR0 |= (1<<COM00);
+ break;
+ }
+ return 0;
+}
+
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c b/src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c
new file mode 100644
index 0000000..47aad1c
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c
@@ -0,0 +1,31 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+//Function to Set Duty cycle and Top Value of PWM Output generated by Timer1 at OC1A or OC1B pin.
+
+#include "AVRPeripheralPWM.h"
+
+uint8 u8AVRPWM1SetDutys(uint8 output_pin, uint16 duty, uint16 Top_Value)
+{
+ uint16 duty_value = 0;
+ ICR1 = Top_Value;
+ if(output_pin==0)
+ {
+ duty_value = (((uint16)(duty * Top_Value))/100);
+ OCR1A = duty_value;
+ }
+ else if(output_pin==1)
+ {
+ duty_value = (((uint16)(duty * Top_Value))/100);
+ OCR1B = duty_value;
+ }
+ return 0;
+}
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM1Setups.c b/src/c/hardware/avr/pwm/u8AVRPWM1Setups.c
new file mode 100644
index 0000000..b3f2d8f
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM1Setups.c
@@ -0,0 +1,69 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+//Function to Setup PWM output for OC1A or OC1B pin.
+
+#include "AVRPeripheralPWM.h"
+
+uint8 u8AVRPWM1Setups(uint8 waveform_mode, uint8 output_mode, uint8 output_pin)
+{
+ switch(waveform_mode)
+ {
+ case 0:
+ TCCR1A |= (1<<WGM11);
+ TCCR1B |= (1<<WGM13);
+ break;
+
+ case 1:
+ TCCR1A |= (1<<WGM11);
+ TCCR1B |= (1<<WGM12)|(1<<WGM13);
+ break;
+
+ case 2:
+ TCCR1B |= (1<<WGM12)|(1<<WGM13);
+ break;
+ }
+ if(output_pin==0)
+ {
+ switch(output_mode)
+ {
+ case 0:
+ TCCR1A |= (1<<COM1A1);
+ break;
+
+ case 1:
+ TCCR1A |= (1<<COM1A0)|(1<<COM1A1);
+ break;
+
+ case 2:
+ TCCR1A |= (1<<COM1A0);
+ break;
+ }
+ }
+ else if(output_pin==1)
+ {
+ switch(output_mode==0)
+ {
+ case 0:
+ TCCR1A |= (1<<COM1B1);
+ break;
+
+ case 1:
+ TCCR1A |= (1<<COM1B0)|(1<<COM1B1);
+ break;
+
+ case 2:
+ TCCR1A |= (1<<COM1B0);
+ break;
+ }
+ }
+ return 0;
+}
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c b/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c
new file mode 100644
index 0000000..e0b5318
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c
@@ -0,0 +1,22 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+//Function to Set Duty cycle of PWM Output generated by Timer2 at OC2 pin.
+
+#include "AVRPeripheralPWM.h"
+
+uint8 u8AVRPWM2SetDutys(uint8 duty)
+{
+ uint8 duty_value = 0;
+ duty_value = (uint8)(((uint16)(duty * 0xff))/100);
+ OCR2 = duty_value;
+ return 0;
+}
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c b/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c
new file mode 100644
index 0000000..f5f8767
--- /dev/null
+++ b/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c
@@ -0,0 +1,47 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Ashish Kamble
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+//Function to Setup PWM output for OC2 pin.
+
+#include "AVRPeripheralPWM.h"
+
+uint8 u8AVRPWM2Setups(uint8 waveform_mode, uint8 output_mode)
+{
+ switch(waveform_mode)
+ {
+ case 0:
+ TCCR2 |= (1<<WGM20);
+ break;
+
+ case 1:
+ TCCR2 |= (1<<WGM20)|(1<<WGM21);
+ break;
+
+ case 2:
+ TCCR2 |= (1<<WGM21);
+ break;
+ }
+ switch(output_mode)
+ {
+ case 0:
+ TCCR2 |= (1<<COM21);
+ break;
+
+ case 1:
+ TCCR2 |= (1<<COM20)|(1<<COM21);
+ break;
+
+ case 2:
+ TCCR2 |= (1<<COM20);
+ break;
+ }
+ return 0;
+}
diff --git a/src/c/hardware/avr/pwm/u8AVRPWMSetDutys.c b/src/c/hardware/avr/pwm/u8AVRPWMSetDutys.c
deleted file mode 100644
index 0f358fc..0000000
--- a/src/c/hardware/avr/pwm/u8AVRPWMSetDutys.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// Function to set duty for PWM of AVR
-//
-// Calling Sequence
-// u8AVRPWMSetDutys(uint8 timer, uint8 duty)
-//
-// Parameters
-// timer: timer to be used for PWM generation (0,1,2)
-// duty: duty for PWM waveform (0-100)
-//
-// Description
-// This function sets duty for PWM waveform according to given parameters.
-//
-// Examples
-// u8AVRPWMSetDutys(0,10) //Sets 10% duty for timer 0 output.
-//
-// Authors
-// Siddhesh Wani
-//
-
-#include "AVRPeripheralPWM.h"
-
-void u8AVRPWMSetDutys(uint8 timer, uint8 duty)
-{
- uint8 duty_value=0;
-
- switch(timer)
- {
- case 0:
- duty_value = (uint8)(((uint16)(duty * 0xff))/100);
- OCR0 = duty_value;
- break;
- case 2:
- duty_value = (uint8)(((uint16)(duty * 0xff))/100);
- OCR2 = duty_value;
- break;
- }
-
-
-}
diff --git a/src/c/hardware/avr/pwm/u8AVRPWMSetups.c b/src/c/hardware/avr/pwm/u8AVRPWMSetups.c
deleted file mode 100644
index 945f231..0000000
--- a/src/c/hardware/avr/pwm/u8AVRPWMSetups.c
+++ /dev/null
@@ -1,60 +0,0 @@
-// Function to initialise PWM of AVR
-//
-// Calling Sequence
-// u8AVRPWMSetups(uint8 timer, uint8 prescalar, uint8 waveform_mode, uint8 output_mode)
-//
-// Parameters
-// timer: timer to be used for PWM generation (0,1,2)
-// prescalar: prescalar to be used for generating PWM waveform (0-7)
-// waveform_mode: decides type of waveform generation
-// 0 -> Normal mode
-// 1 -> Phase correct mode
-// 2 -> CTC mode
-// 3 -> Fase PWM mode
-// output_mode: decides the compare output mode. (0-3)
-// behaviour of the output is different for different inputs
-// depending upon 'waveform_mode' chosen.
-// ***Refer datasheet for more description about above modes
-//
-// Description
-// This function initialises PWM of AVR with given parameters. 'timer'
-// decides which of the three (0,1,2) timers available to be used. The
-// 'prescalar' is needed for deciding PWM clock. Select appropriate prescalar
-// depending on MCU clock. Choose required pwmmode using 'waveform_generation'
-// and 'output_mode'. Please refer datasheet for more description of 'wafefom_mode'
-// and 'output mode'.
-// Examples
-// AVRPWMSetup(0,1,2,2)
-//
-// Authors
-// Siddhesh Wani
-//
-
-#include "AVRPeripheralPWM.h"
-
-
-void u8AVRPWMSetups(uint8 timer, uint8 prescalar, uint8 waveform_mode, uint8 output_mode)
-{
- switch(timer)
- {
- case 0:
- TCCR0|= (prescalar & 0x07); //Select clock source
- //Select waveform generation mode
- TCCR0|= ((waveform_mode & 0x04) << 4);
- //Select compare output mode
- TCCR0 |= ((output_mode & 0x01) << 3); //WGM0
- TCCR0 |= ((output_mode & 0x02) << 6); //WGM1
- break;
- case 1:
- break;
- case 2:
- TCCR2|= (prescalar & 0x07); //Select clock source
- //Select waveform generation mode
- TCCR2|= ((waveform_mode & 0x04) << 4);
- //Select compare output mode
- TCCR2 |= ((output_mode & 0x01) << 3); //WGM0
- TCCR2 |= ((output_mode & 0x02) << 6); //WGM1
- break;
- }
-}
-