summaryrefslogtreecommitdiff
path: root/2.3-1/src/c/hardware/rasberrypi/interfaces
diff options
context:
space:
mode:
Diffstat (limited to '2.3-1/src/c/hardware/rasberrypi/interfaces')
-rw-r--r--2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralDigital.h33
-rw-r--r--2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPWM.h30
-rw-r--r--2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPinISR.h25
-rw-r--r--2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralSerial.h47
-rw-r--r--2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralThreading.h25
-rw-r--r--2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralTiming.h34
6 files changed, 194 insertions, 0 deletions
diff --git a/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralDigital.h b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralDigital.h
new file mode 100644
index 00000000..40a8e1a4
--- /dev/null
+++ b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralDigital.h
@@ -0,0 +1,33 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Siddhesh Wani
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+
+#ifndef __INT_RPIPERIPHERALGPIO_H__
+#define __INT_RPIPERIPHERALGPIO_H__
+
+#include "types.h"
+#include "RPIPeripheralDigital.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RPI_DigitalSetup(in1,in2) u8RPIDigitalSetups((uint8) in1, (uint8) in2);
+
+#define RPI_DigitalIn(in1) u8RPIDigitalIns((uint8) in1);
+
+#define RPI_DigitalOut(in1,in2) u8RPIDigitalOuts((uint8) in1, (uint8) in2);
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /* !__RPIPERIPHERALGPIO_H__ */
diff --git a/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPWM.h b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPWM.h
new file mode 100644
index 00000000..8c8f4c62
--- /dev/null
+++ b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPWM.h
@@ -0,0 +1,30 @@
+ /* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Siddhesh Wani
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+ */
+#ifndef __INT_RPIPERIPHERALPWM_H__
+#define __INT_RPIPERIPHERALPWM_H__
+
+#include "types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RPI_HardPWMWrite(pin,value) u8RPIHardPWMWrites((uint8)pin,(uint16)value)
+#define RPI_HardPWMSetRange(value) u8RPIHardPWMSetRanges((uint16)value)
+#define RPI_HardPWMSetMode(mode) u8RPIHardPWMSetModes((uint8)mode)
+#define RPI_HardPWMSetClock(clk_divisor) u8RPIHardPWMSetClocks((uint16)clk_divisor)
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*__INT_RPIPERIPHERALPWM_H__*/
diff --git a/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPinISR.h b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPinISR.h
new file mode 100644
index 00000000..b2c1ed16
--- /dev/null
+++ b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralPinISR.h
@@ -0,0 +1,25 @@
+ /* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Siddhesh Wani
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+ */
+#ifndef __INT_RPIPERIPHERALPINISR_H__
+#define __INT_RPIPERIPHERALPINISR_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RPI_PinISR(pin,edge,funname) i16RPIPinISRs((uint8)pin,(uint8)edge,funname)
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*__INT_RPIPERIPHERALPINISR_H__*/
diff --git a/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralSerial.h b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralSerial.h
new file mode 100644
index 00000000..5d53b98b
--- /dev/null
+++ b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralSerial.h
@@ -0,0 +1,47 @@
+ /* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Siddhesh Wani
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+ */
+#ifndef __INT_RPIPERIPHERALSERIAL_H__
+#define __INT_RPIPERIPHERALSERIAL_H__
+
+#include "types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RPI_SerialSetup(port,size,baudrate) u16RPISerialSetups(port,baudrate)
+#define RPI_SerialClose(fd) u8RPISerialCloses(fd)
+
+#define u80u80RPI_SerialSendData(fd,data) u8RPISerialSendDatas(fd,data)
+#define u80i80RPI_SerialSendData(fd,data) i8RPISerialSendDatas(fd,data)
+#define u80u160RPI_SerialSendData(fd,data) u16RPISerialSendDatas(fd,data)
+#define u80i160RPI_SerialSendData(fd,data) i16RPISerialSendDatas(fd,data)
+#define u80s0RPI_SerialSendData(fd,data) sRPISerialSendDatas(fd,data)
+#define u80d0RPI_SerialSendData(fd,data) dRPISerialSendDatas(fd,data)
+
+#define u80u82RPI_SerialSendData(fd,data,size) u8RPISerialSendDataa(fd,data,size[0]*size[1]);
+#define u80i82RPI_SerialSendData(fd,data,size) i8RPISerialSendDataa(fd,data,size[0]*size[1]);
+#define u80u162RPI_SerialSendData(fd,data,size) u16RPISerialSendDataa(fd,data,size[0]*size[1]);
+#define u80i162RPI_SerialSendData(fd,data,size) i16RPISerialSendDataa(fd,data,size[0]*size[1]);
+#define u80s2RPI_SerialSendData(fd,data,size) sRPISerialSendDataa(fd,data,size[0]*size[1]);
+#define u80d2RPI_SerialSendData(fd,data,size) dRPISerialSendDataa(fd,data,size[0]*size[1]);
+#define u80g2RPI_SerialSendData(fd,data,size) gRPISerialSendDatas(fd,data,size[0]*size[1]);
+
+#define RPI_SerialDataAvail(fd) i16RPISerialDataAvails(fd)
+#define RPI_SerialGetChar(fd) i16RPISerialGetChars(fd)
+#define RPI_SerialFlush(fd) u8RPISerialFlushs(fd)
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*__INT_RPIPERIPHERALSERIAL_H__*/
diff --git a/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralThreading.h b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralThreading.h
new file mode 100644
index 00000000..68ed6e0e
--- /dev/null
+++ b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralThreading.h
@@ -0,0 +1,25 @@
+ /* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Siddhesh Wani
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+ */
+#ifndef __INT_RPIPERIPHERALTHREADING_H__
+#define __INT_RPIPERIPHERALTHREADING_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RPI_ThreadCreate(fn) RPIThreadCreate(fn);
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*__INT_RPIPERIPHERALTHREADING_H__*/
diff --git a/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralTiming.h b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralTiming.h
new file mode 100644
index 00000000..1a704655
--- /dev/null
+++ b/2.3-1/src/c/hardware/rasberrypi/interfaces/int_RPIPeripheralTiming.h
@@ -0,0 +1,34 @@
+/* Copyright (C) 2016 - IIT Bombay - FOSSEE
+
+ This file must be used under the terms of the CeCILL.
+ This source file is licensed as described in the file COPYING, which
+ you should have received as part of this distribution. The terms
+ are also available at
+ http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
+ Author: Siddhesh Wani
+ Organization: FOSSEE, IIT Bombay
+ Email: toolbox@scilab.in
+*/
+
+
+#ifndef __INT_RPIPERIPHERALTIMING_H__
+#define __INT_RPIPERIPHERALTIMING_H__
+
+#include "types.h"
+#include "RPIPeripheralTiming.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RPI_DelayMicro(in1) u16RPIDelayMicros((uint16) in1)
+#define RPI_DelayMilli(in1) u16RPIDelayMillis((uint16) in1)
+#define RPI_GetMicro() u32RPIGetMicros()
+#define RPI_GetMillis() u32RPIGetMillis()
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /* !__RPIPERIPHERALTIMING_H__ */