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| author | Brijeshcr | 2017-09-11 12:03:59 +0530 |
|---|---|---|
| committer | GitHub | 2017-09-11 12:03:59 +0530 |
| commit | b2518f279a3005536e87e45302d4e05d9aeb6d3d (patch) | |
| tree | 007de2537151d82e75a6015f47f228402144763e /2.3-1/src/c/signalProcessing/interfaces/int_weiner.h | |
| parent | a7ca3ed26f1fa8f51c586aba300005bf4a700cc4 (diff) | |
| parent | 75558fc35bebe72c6db7e1b3b0c7ae214aa4fc8e (diff) | |
| download | Scilab2C-master.tar.gz Scilab2C-master.tar.bz2 Scilab2C-master.zip | |
Merged and added functions
Diffstat (limited to '2.3-1/src/c/signalProcessing/interfaces/int_weiner.h')
| -rw-r--r-- | 2.3-1/src/c/signalProcessing/interfaces/int_weiner.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/2.3-1/src/c/signalProcessing/interfaces/int_weiner.h b/2.3-1/src/c/signalProcessing/interfaces/int_weiner.h new file mode 100644 index 00000000..daefcf03 --- /dev/null +++ b/2.3-1/src/c/signalProcessing/interfaces/int_weiner.h @@ -0,0 +1,20 @@ +/* Copyright (C) 2016 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Abhinav Dronamraju + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in + */ + +#ifndef __INT_WIENER_H__ +#define __INT_WIENER_H__ + +#define d2d2d2d2d2d2d2d2wienerd2d2d2d2(in1, size1, in2, size2, in3, size3, in4, size4, in5, size5, in6, size6, in7, size7, in8, size8, out1, out2, out3, out4) \ + dwienera(in1, size1[0], size1[1],in2, size2[0], size2[1],in3, size3[0], size3[1],in4, size4[0], size4[1],in5, size5[0], size5[1] ,\ + in6, size6[0], size6[1],in7, size7[0], size7[1],in8, size8[0], size8[1], out1, out2, out3, out4) + +#endif /* !INT_WEINER_H__! */ |