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author | Brijeshcr | 2017-07-06 15:49:18 +0530 |
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committer | GitHub | 2017-07-06 15:49:18 +0530 |
commit | 850c0ff1ca5cd660b76d0568a215bab0547312ad (patch) | |
tree | 26fc9679644561759e8a2c4080059d30b70a3105 /2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c | |
parent | a7eeecce4c7c39ea52a2d434815c574a2c42730d (diff) | |
parent | c600ebcb67961fe6007ba41fd5ad987da3af7f6e (diff) | |
download | Scilab2C-850c0ff1ca5cd660b76d0568a215bab0547312ad.tar.gz Scilab2C-850c0ff1ca5cd660b76d0568a215bab0547312ad.tar.bz2 Scilab2C-850c0ff1ca5cd660b76d0568a215bab0547312ad.zip |
Merge pull request #4 from FOSSEE/revert-3-master
Revert "LinearAlgebra Function Added"
Diffstat (limited to '2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c')
-rw-r--r-- | 2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c b/2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c index 88f8a66d..30459782 100644 --- a/2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c +++ b/2.3-1/src/c/scilab-arduino/sleep/u16sleeps.c @@ -6,11 +6,13 @@ are also available at http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt Author: Siddhesh Wani + Revised by: Yash Pratap Singh Tomar Organization: FOSSEE, IIT Bombay Email: toolbox@scilab.in */ #include "sleep.h" +#include "Arduino.h" void u16sleeps(uint16 delay_ms) { |