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author | yash1112 | 2017-07-07 21:20:49 +0530 |
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committer | yash1112 | 2017-07-07 21:20:49 +0530 |
commit | 9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0 (patch) | |
tree | f50d6e06d8fe6bc1a9053ef10d4b4d857800ab51 /2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c | |
download | Scilab2C-9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0.tar.gz Scilab2C-9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0.tar.bz2 Scilab2C-9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0.zip |
sci2c arduino updated
Diffstat (limited to '2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c')
-rw-r--r-- | 2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c b/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c new file mode 100644 index 00000000..f5f87672 --- /dev/null +++ b/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2Setups.c @@ -0,0 +1,47 @@ +/* Copyright (C) 2016 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Ashish Kamble + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in +*/ +//Function to Setup PWM output for OC2 pin. + +#include "AVRPeripheralPWM.h" + +uint8 u8AVRPWM2Setups(uint8 waveform_mode, uint8 output_mode) +{ + switch(waveform_mode) + { + case 0: + TCCR2 |= (1<<WGM20); + break; + + case 1: + TCCR2 |= (1<<WGM20)|(1<<WGM21); + break; + + case 2: + TCCR2 |= (1<<WGM21); + break; + } + switch(output_mode) + { + case 0: + TCCR2 |= (1<<COM21); + break; + + case 1: + TCCR2 |= (1<<COM20)|(1<<COM21); + break; + + case 2: + TCCR2 |= (1<<COM20); + break; + } + return 0; +} |