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author | siddhu8990 | 2017-04-19 14:28:34 +0530 |
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committer | siddhu8990 | 2017-04-19 14:28:34 +0530 |
commit | 586db6343e7b472d8dc3e63a82f4c73f99cdcbd7 (patch) | |
tree | e74d643b27634303e772074fc61a717ff400ac0a /2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c | |
parent | 645c51daadc9a5c9374b0465ded05f84bca65183 (diff) | |
download | Scilab2C-586db6343e7b472d8dc3e63a82f4c73f99cdcbd7.tar.gz Scilab2C-586db6343e7b472d8dc3e63a82f4c73f99cdcbd7.tar.bz2 Scilab2C-586db6343e7b472d8dc3e63a82f4c73f99cdcbd7.zip |
Merged Ashish's work
Diffstat (limited to '2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c')
-rw-r--r-- | 2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c b/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c new file mode 100644 index 00000000..e0b53186 --- /dev/null +++ b/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM2SetDutys.c @@ -0,0 +1,22 @@ +/* Copyright (C) 2016 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Ashish Kamble + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in +*/ +//Function to Set Duty cycle of PWM Output generated by Timer2 at OC2 pin. + +#include "AVRPeripheralPWM.h" + +uint8 u8AVRPWM2SetDutys(uint8 duty) +{ + uint8 duty_value = 0; + duty_value = (uint8)(((uint16)(duty * 0xff))/100); + OCR2 = duty_value; + return 0; +} |