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| author | yash1112 | 2017-07-07 21:20:49 +0530 |
|---|---|---|
| committer | yash1112 | 2017-07-07 21:20:49 +0530 |
| commit | 9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0 (patch) | |
| tree | f50d6e06d8fe6bc1a9053ef10d4b4d857800ab51 /2.3-1/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c | |
| download | Scilab2C-9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0.tar.gz Scilab2C-9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0.tar.bz2 Scilab2C-9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0.zip | |
sci2c arduino updated
Diffstat (limited to '2.3-1/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c')
| -rw-r--r-- | 2.3-1/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c b/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c new file mode 100644 index 00000000..106a872e --- /dev/null +++ b/2.3-1/src/c/hardware/avr/pwm/u8AVRPWM0SetDutys.c @@ -0,0 +1,24 @@ +/* Copyright (C) 2016 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Ashish Kamble + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in +*/ +//Function to Set Duty cycle of PWM Output generated by Timer0 at OC0 pin. + + +#include "AVRPeripheralPWM.h" + +uint8 u8AVRPWM0SetDutys(uint8 duty) +{ + uint8 duty_value = 0; + duty_value = (((uint16)(duty * 0xff))/100); + OCR0 = duty_value; + return 0; +} + |