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authoryash11122017-07-07 22:03:16 +0530
committeryash11122017-07-07 22:03:16 +0530
commit640f9fcf3f64298c7958f4bde5a7e6a7602a690d (patch)
treef2d5c577e9c719190f2ce68c976a9acefd6611c6 /2.3-1/src/c/CACSD/interfaces/int_lqr.h
parente9de337a34e123749927039f7011fb30fc96f7c9 (diff)
parent9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0 (diff)
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Scilab2C Arduino Updated
Diffstat (limited to '2.3-1/src/c/CACSD/interfaces/int_lqr.h')
-rw-r--r--2.3-1/src/c/CACSD/interfaces/int_lqr.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/2.3-1/src/c/CACSD/interfaces/int_lqr.h b/2.3-1/src/c/CACSD/interfaces/int_lqr.h
index 8deba90b..c292f8c1 100644
--- a/2.3-1/src/c/CACSD/interfaces/int_lqr.h
+++ b/2.3-1/src/c/CACSD/interfaces/int_lqr.h
@@ -16,6 +16,7 @@
extern "C" {
#endif
+<<<<<<< HEAD
#define ss2lqrd2d2(in1,size1,out1,out2) dlqra(in1,size1[0],size1[1],NULL,\
NULL,NULL,out1,out2);
@@ -24,6 +25,9 @@ extern "C" {
#define ss2d2d2d2lqrd2d2(in1,size1,in2,size2,in3,size3,in4,size4,out1,out2) \
dlqra(in1,size1[0],size1[1],in2,in3,in4,out1,out2);
+=======
+#define ss2lqrd2d2(in1,size1,out1,out2) dlqra(in1,size1[0],size1[1],out1,out2);
+>>>>>>> 9e5793a7b05b23e6044a6d7a9ddd5db39ba375f0
#ifdef __cplusplus
} /* extern "C" */