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//Example 8.12
clc
disp("The fig.8.20 shows divided-by-6 (MOD 6) counter using 7493. As shown in the fig.8.20, the clock is applied to inout B of IC 7493 and the output count sequenceis taken from QD, QC and QB. As soon as count is 110, i.e. QD and QC = 1, the internal NAND gate output goes low and it resets the counter.")
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